Patents by Inventor Nisar Ahmed

Nisar Ahmed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12283991
    Abstract: Disclosed herein are methods and systems for configuring a spectral loading pattern for a transmission line segment in an optical network, the method comprising obtaining at least one loading policy, activating at least one of the at least one loading policy, receiving a plurality of requested operations, obtaining one or more static datapoint and one or more dynamic datapoint associated with the transmission line segment, obtaining loading parameters and one or more loading algorithm from the at least one activated loading policy, generating a loading response according to the one or more loading algorithm, and changing a spectral loading pattern of the transmission line segment based on the loading response. The requested operations may identify operations to be executed in either of a current cycle or one or more subsequent cycle. The loading response may identify a subset of the operations to be executed in the current cycle.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: April 22, 2025
    Assignee: Infinera Corporation
    Inventors: Jonathan M. Buset, Stephane St. Laurent, Daniel Fonseca, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham, Thomas Gerard
  • Publication number: 20250112724
    Abstract: A network element comprises a light source generating an optical signal having a USP with a USP bandwidth, an ASE source generating ASE noise, a WSS partitioning the ASE noise into a series of ASE passbands comprising a default bandwidth, an allocated start frequency, and an allocated end frequency, a processor and a memory storing instructions to: mark the ASE passband for deactivation or adjustment based on a comparison of spectral slices of the USP and spectral slices of each ASE passband such that for fully overlapping set of spectral slices the respective ASE is marked for deactivation and for partially overlapping sets of spectral slices, the respective ASE is marked for adjustment so long as a minimum slice threshold is met, otherwise the respective ASE is marked for deactivation; deactivate or adjust the ASE passbands based on their respective marking; and ramp the one or more user signal passband.
    Type: Application
    Filed: September 30, 2024
    Publication date: April 3, 2025
    Inventors: Jonathan Michael Buset, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham, Thomas Gerard, Francisco Javier Vaquero Caballero
  • Publication number: 20250112723
    Abstract: A network element comprises a light source generating an optical signal having a USP with a USP bandwidth, an ASE source generating ASE noise, a WSS partitioning the ASE noise into a series of ASE passbands comprising a default bandwidth, an allocated start frequency, and an allocated end frequency, a processor and a memory storing a band layout map having a current start frequency and a current end frequency for each ASE passband and comprising a unique deterministic layout of the ASE passbands, and instructions to: receive a USP operation; identify one or more ASE passbands impacted by the USP based on the band layout map and generate a bandwidth tracker comprising tracking attributes for the identified ASE passbands; adjust the tracking attributes for the identified ASE passbands based on the USP operation; and generate resize intent instructions for the identified ASE passbands based on the bandwidth tracker.
    Type: Application
    Filed: September 30, 2024
    Publication date: April 3, 2025
    Inventors: Ashok Kunjidhapatham, Sanjeev Ramachandran, Nisar Ahmed, Jonathan Michael Buset
  • Publication number: 20250112722
    Abstract: A network element is disclosed herein. The network element comprises an ASE source generating ASE noise, a first WSS receiving a first optical signal comprising USPs having an expected power, a second WSS to attenuate ASE noise into ASE passbands and multiplexes the ASE passbands and the first optical signal into a second optical signal having second passbands, a spectral measurement device to detect optical power, and a controller having a processor and memory storing instructions causing the processor to: receive an optical power of the first optical signal from the spectral measurement device; detect a passband failure based on the optical power, the passband failure associated with a failed passband being one of: the USPs; generate the ASE passband; cause the second WSS to multiplex the ASE passband into the second optical signal; and cause the second WSS to activate the ASE passband to replace the failed passband.
    Type: Application
    Filed: September 30, 2024
    Publication date: April 3, 2025
    Inventors: Jonathan Michael Buset, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham, Thomas Gerard, Francisco Javier Vaquero Caballero
  • Publication number: 20250113124
    Abstract: Methods and systems are herein disclosed, including a method comprising receiving an operation to execute, dividing the operation into first and second sub-operations, executing the first sub-operation in a first loading cycle, and executing the second sub-operation in a second loading cycle after the first loading cycle. The operation is either an activation or a deactivation of one or more signal passbands in an optical spectrum for transmission in a fiber optic line. Each of the one or more signal passbands contains one or more optical carriers carrying user data. The first sub-operation identifies one or more first sub-passbands. The second sub-operation identifies one or more second sub-passbands. The one or more first sub-passbands and the one or more second sub-passbands are each a portion of the one or more signal passbands.
    Type: Application
    Filed: September 30, 2024
    Publication date: April 3, 2025
    Inventors: Jonathan Michael Buset, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham, Thomas Gerard, Francisco Javier Vaquero Cabaliero
  • Publication number: 20250112695
    Abstract: Optical networks, network elements, and methods of use are described herein, including a network element comprising a processor; and a non-transitory computer readable memory storing instructions that, when executed by the processor, cause the processor to: receive, from a headend network element, instructions to collect a QoS baseline measurement indicative of performance of optical carrier(s) on a transmission line, collect the QoS baseline measurement; collect a QoS current measurement of the QoS data, after a first spectral loading operation is performed on the transmission line segment by the headend network element; determine that a numerical difference between the QoS current measurement and the QoS baseline measurement is outside of a predetermined threshold; and send instructions to the headend network element to abort a second spectral loading operation for the transmission line segment and to execute an AGC cycle to adjust amplifier operating conditions.
    Type: Application
    Filed: September 26, 2024
    Publication date: April 3, 2025
    Inventors: Jonathan Michael Buset, Thomas Gerard, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham
  • Publication number: 20240277826
    Abstract: The invention relates to a method and to a medicament for use in the treatment of COVID-19 and related pathologies, the medicament comprising or interacting with one or more conserved regions of at least 4 consecutive amino acids with a 100% match present in both the SARS-CoV-2 proteome and the human proteome, wherein the one or more conserved regions are preferably selected by: a. identification of one or more conserved regions of at least 4 consecutive amino acids with a 100% match between the SARS-CoV-2 proteome and the human proteome; b.
    Type: Application
    Filed: June 20, 2021
    Publication date: August 22, 2024
    Inventors: Nisar Ahmed KHAN, Robbert BENNER
  • Publication number: 20230327762
    Abstract: Disclosed herein are methods and systems for configuring a spectral loading pattern for a transmission line segment in an optical network, the method comprising obtaining at least one loading policy, activating at least one of the at least one loading policy, receiving a plurality of requested operations, obtaining one or more static datapoint and one or more dynamic datapoint associated with the transmission line segment, obtaining loading parameters and one or more loading algorithm from the at least one activated loading policy, generating a loading response according to the one or more loading algorithm, and changing a spectral loading pattern of the transmission line segment based on the loading response. The requested operations may identify operations to be executed in either of a current cycle or one or more subsequent cycle. The loading response may identify a subset of the operations to be executed in the current cycle.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 12, 2023
    Inventors: Jonathan M. Buset, Stephane St. Laurent, Daniel Fonseca, Nisar Ahmed, Sanjeev Ramachandran, Ashok Kunjidhapatham, Thomas Gerard
  • Publication number: 20230327795
    Abstract: A network element is disclosed herein. The network element comprises an add transceiver to generate a first optical signal having one or more optical channel; a line port optically coupled to an optical fiber link; an optical signal inspector operable to sample an optical power of one or more spectral slice of the one or more optical channel; a WSS operable to attenuate the one or more spectral slice of the first optical signal; a processor; and a memory storing instructions that cause the processor to: determine a sample power profile based on the optical power of the one or more spectral slices; generate an attenuation profile based on the sample power profile and a target power profile; and apply the attenuation profile to cause the WSS to shape the one or more spectral slices of the first optical signal into the second optical signal.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 12, 2023
    Inventors: Jonathan M. Buset, Lan Liu, Nisar Ahmed, Thomas Gerard, Francisco Javier Vaquero Caballero
  • Publication number: 20230269020
    Abstract: A multiplexer module and method are herein disclosed. The multiplexer module comprises a WSS configured to receive a plurality of first optical signals, selectively multiplex the first optical signals into a second optical signal, and output the second optical signal; an OPM operable to determine a power of one or more slice within a sample optical signal, the sample optical signal being selected from a group consisting of a particular optical signal of the first optical signals and a portion of the second optical signal including the particular optical signal; a processor; and a memory storing instructions that cause the processor to: validate the particular optical signal using the power of one or more slice within the sample optical signal; and if the particular optical signal is valid, cause the WSS to open a particular passband so as to multiplex the particular optical signal into the second optical signal.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 24, 2023
    Inventors: Jonathan Michael Buset, Nisar Ahmed, Francisco Javier Vaquero Caballero, Thomas Gerard, Stephane St-Laurent
  • Patent number: 10556671
    Abstract: A tile assembly (22) which, in use, is fitted to a base structure to form at least part of a fluid washed surface. The tile assembly comprises a housing (42) with at least one plenum (45) being provided within the housing (42). A wall (44) of the housing (42) is provided with a plurality of flow passages (46) which extend from the plenum side of the wall (44) to an outer surface (48) of the wall. Flow passage closures (50) are provided which are operable to open and close at least some of the flow passages (46).
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 11, 2020
    Assignee: BAE Systems plc
    Inventors: Clyde Warsop, Nisar Ahmed Mirza
  • Patent number: 9768909
    Abstract: In at least one aspect, a device for Orbital Angular Momentum (OAM) based optical communication includes a first spatial light modulator configured to down-convert a first plurality of higher-order OAM modes from a communication signal to a second plurality of higher-order OAM modes and a first Gaussian mode, a second spatial light modulator configured to drop the first Gaussian mode and add a second Gaussian mode to the second plurality of higher-order OAM modes, and a third spatial light modulator configured to up-convert the second plurality of higher-order OAM modes and the second Gaussian mode to a third plurality of higher-order OAM modes for further communications.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: September 19, 2017
    Assignee: University of Southern California
    Inventors: Hao Huang, Yang Yue, Nisar Ahmed, Moshe J. Willner, Yan Yan, Yongxiong Ren, Moshe Tur, Alan E. Willner
  • Patent number: 9547043
    Abstract: Test control point insertion and x-bounding for Logic Built-In Self-Test (LBIST) using observation circuitry. In some embodiments, LBIST circuitry may include a plurality of test control circuits coupled to a scan chain of a Circuit Under Test (CUT), and a plurality of observation circuits coupled to the test control circuits, each of the plurality of observation circuits including one or more latch devices configured to drive a respective one of the plurality of test control circuits. In other embodiments, a method of testing an integrated circuit may include issuing an instruction that a plurality of observation circuits and a plurality of input/output (I/O) control circuits within the integrated circuit enter a test mode, and providing, one or more test patterns to a selected one or more of a plurality of scan chains within the integrated circuit and to each of the plurality of observation circuits.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: January 17, 2017
    Assignee: NXP USA, Inc.
    Inventors: Nisar Ahmed, Orman G. Shofner, Jr.
  • Publication number: 20170001715
    Abstract: A tile assembly (22) which, in use, is fitted to a base structure to form at least part of a fluid washed surface. The tile assembly comprises a housing (42) with at least one plenum (45) being provided within the housing (42). A wall (44) of the housing (42) is provided with a plurality of flow passages (46) which extend from the plenum side of the wall (44) to an outer surface (48) of the wall. Flow passage closures (50) are provided which are operable to open and close at least some of the flow passages (46).
    Type: Application
    Filed: December 22, 2014
    Publication date: January 5, 2017
    Inventors: Clyde WARSOP, Nisar Ahmed MIRZA
  • Patent number: 9298572
    Abstract: A processing system includes a clock generator circuit configured to receive a master clock signal and to output a plurality of clock signals, wherein the plurality of clock signals have a first frequency during a built-in self-test (BIST) mode and a plurality of shift-capture clock generator circuits. Each shift-capture clock generator circuit includes a clock gate circuit and a clock divider circuit and is configured to receive a corresponding one of the plurality of clock signals. At least one of the clock divider circuits changes the first frequency of the one of the plurality of clock signals to a second frequency during the BIST mode.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: March 29, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nisar Ahmed, Anurag Jindal, Nipun Mahajan
  • Publication number: 20150349910
    Abstract: In at least one aspect, a device for Orbital Angular Momentum (OAM) based optical communication includes a first spatial light modulator configured to down-convert a first plurality of higher-order OAM modes from a communication signal to a second plurality of higher-order OAM modes and a first Gaussian mode, a second spatial light modulator configured to drop the first Gaussian mode and add a second Gaussian mode to the second plurality of higher-order OAM modes, and a third spatial light modulator configured to up-convert the second plurality of higher-order OAM modes and the second Gaussian mode to a third plurality of higher-order OAM modes for further communications.
    Type: Application
    Filed: March 19, 2015
    Publication date: December 3, 2015
    Applicant: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Hao Huang, Yang Yue, Nisar Ahmed, Moshe J. Willner, Yan Yan, Yongxiong Ren, Moshe Tur, Alan E. Willner
  • Patent number: 9043620
    Abstract: A data processing system on an integrated circuit includes a core that performs switching operations responsive to a system clock that draws current from the power supply network. An IR-drop detector includes a resistor ladder having outputs representative of an IR-drop caused by the core during the switching operations. The system further includes a plurality of amplifiers coupled to the outputs indicative of the IR-drop, a plurality of flip-flops coupled to the amplifiers, and a variable clock generator. The variable clock generator outputs a sampling clock comprising a group consisting of a variable phase or a variable frequency to the plurality of flip-flops. The flip-flops are triggered by the sampling clock so that the IR-drop at a time during a clock cycle of the system clock can be detected, and the peak IR-drop value for can be tracked.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 26, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Xiaoxiao Wang, Nisar Ahmed, Anis M. Jarrar, Dat T. Tran, Leroy Winemberg
  • Publication number: 20140281717
    Abstract: A processing system includes a clock generator circuit configured to receive a master clock signal and to output a plurality of clock signals, wherein the plurality of clock signals have a first frequency during a built-in self-test (BIST) mode and a plurality of shift-capture clock generator circuits. Each shift-capture clock generator circuit includes a clock gate circuit and a clock divider circuit and is configured to receive a corresponding one of the plurality of clock signals. At least one of the clock divider circuits changes the first frequency of the one of the plurality of clock signals to a second frequency during the BIST mode.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventor: NISAR AHMED
  • Publication number: 20140281642
    Abstract: A data processing system on an integrated circuit includes a core that performs switching operations responsive to a system clock that draws current from the power supply network. An IR-drop detector includes a resistor ladder having outputs representative of an IR-drop caused by the core during the switching operations. The system further includes a plurality of amplifiers coupled to the outputs indicative of the IR-drop, a plurality of flip-flops coupled to the amplifiers, and a variable clock generator. The variable clock generator outputs a sampling clock comprising a group consisting of a variable phase or a variable frequency to the plurality of flip-flops. The flip-flops are triggered by the sampling clock so that the IR-drop at a time during a clock cycle of the system clock can be detected, and the peak IR-drop value for can be tracked.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: XIAOXIAO WANG, NISAR AHMED, ANIS M. JARRAR, DAT T. TRAN, LEROY WINEMBERG
  • Publication number: 20140281778
    Abstract: A processing system includes a clock generator circuit configured to receive a master clock signal and to output a plurality of clock signals, wherein the plurality of clock signals have a first frequency during a built-in self-test (BIST) mode and a plurality of shift-capture clock generator circuits. Each shift-capture clock generator circuit includes a clock gate circuit and a clock divider circuit and is configured to receive a corresponding one of the plurality of clock signals. At least one of the clock divider circuits changes the first frequency of the one of the plurality of clock signals to a second frequency during the BIST mode.
    Type: Application
    Filed: August 14, 2013
    Publication date: September 18, 2014
    Inventors: Nisar Ahmed, Anurag Jindal, Nipun Mahajan