Abstract: An asynchronous circuit that implements a dual pipeline stage is disclosed. The input stage of the circuit receives asynchronous data. A first converter separates the data from the input stage into alternating pipelines to allow parallel execution. A second converter then merges the data from the dual pipelines back into a single output stage. This technique is useful in improving the speed of a circuit, as it allows parallel execution. In other embodiments, the dual pipelines offer fault tolerance. In some embodiments, the protocol used in the input and output stages is different from that employed in the dual pipelines.

Abstract: Surface impacts are located and characterized based on an acoustic signal produced by the impact despite the presence of signal dispersion. Acoustic signals from the surface may be compared to acoustic signals detected external to the surface in order to eliminate spurious impact sensing due to external sounds. Low-frequency acoustic signals may be sensed and identified as explicit hard “bangs” which are of limited utility for pointing and tracking applications.

Abstract: Surface impacts are located and characterized based on an acoustic signal produced by the impact despite the presence of signal dispersion. Acoustic signals from the surface may be compared to acoustic signals detected external to the surface in order to eliminate spurious impact sensing due to external sounds. Low-frequency acoustic signals may be sensed and identified as explicit hard “bangs” which are of limited utility for pointing and tracking applications.

Abstract: Surface impacts are located and characterized based on an acoustic signal produced by the impact despite the presence of signal dispersion. Acoustic signals from the surface may be compared to acoustic signals detected external to the surface in order to eliminate spurious impact sensing due to external sounds. Low-frequency acoustic signals may be sensed and identified as explicit hard “bangs” which are of limited utility for pointing and tracking applications.

Abstract: System and method for analyzing substrate noise is disclosed, which is capable of accepting inputs of increasing complexity and granularity. During the early phases, the tool can accept coarse circuit descriptions, such as gate level netlists. The tool is capable of generating rudimentary substrate models based on estimated die size, allowing the designer to have an early indication of potential substrate noise issues. During the middle phases, the tool can accept more accurate circuit descriptions, such as a SPICE netlist. A more detailed substrate model can be generated, which considers layout information, thereby allowing the designer to make layout and circuit modifications before the circuit is completed. Lastly, during final verification, the tool can accept an even more accurate netlist, such as a SPICE netlist that includes parasitic capacitance. The tool can also accept a more detailed substrate model and provides the substrate noise analysis necessary to finalize the design.

Abstract: System and method for analyzing substrate noise is disclosed, which is capable of accepting inputs of increasing complexity and granularity. During the early phases, the tool can accept coarse circuit descriptions, such as gate level netlists. The tool is capable of generating rudimentary substrate models based on estimated die size, allowing the designer to have an early indication of potential substrate noise issues. During the middle phases, the tool can accept more accurate circuit descriptions, such as a SPICE netlist. A more detailed substrate model can be generated, which considers layout information, thereby allowing the designer to make layout and circuit modifications before the circuit is completed. Lastly, during final verification, the tool can accept an even more accurate netlist, such as a SPICE netlist that includes parasitic capacitance. The tool can also accept a more detailed substrate model and provides the substrate noise analysis necessary to finalize the design.

Abstract: A multi-layer integrated semiconductor structure is provided, which includes at least a first semiconductor structure and a second semiconductor structure coupled together via an interface. The interface includes at least a first portion adapted to provide a communication interface between the first semiconductor structure and the second semiconductor structure and at least a second portion adapted to reduce electrical interference between the first semiconductor structure and the second semiconductor structure.

Abstract: A multi-layer integrated semiconductor structure is provided, which includes at least a first semiconductor structure and a second semiconductor structure coupled together via an interface. The interface includes at least a first portion adapted to provide a communication interface between the first semiconductor structure and the second semiconductor structure and at least a second portion adapted to reduce electrical interference between the first semiconductor structure and the second semiconductor structure.

Abstract: Surface impacts are located and characterized based on an acoustic signal produced by the impact despite the presence of signal dispersion. Acoustic signals from the surface may be compared to acoustic signals detected external to the surface in order to eliminate spurious impact sensing due to external sounds. Low-frequency acoustic signals may be sensed and identified as explicit hard “bangs” which are of limited utility for pointing and tracking applications.