Patents by Inventor Nishank Pathak

Nishank Pathak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reduced bandwidth tessellation factors
    Patent number: 11010862
    Abstract: A graphics pipeline reduces the number of tessellation factors written to and read from a graphics memory. A hull shader stage of the graphics pipeline detects whether at least a threshold percentage of the tessellation factors for a thread group of patches are the same and, in some embodiments, whether at least the threshold percentage of the tessellation factors for a thread group of patches have a same value that either indicates that the plurality of patches are to be culled or that the plurality of patches are to be passed to a tessellator stage of the graphics pipeline.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: May 18, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Mangesh P. Nijasure, Tad Litwiller, Todd Martin, Nishank Pathak