Abstract: A method for performing Tile to Raster (T2R) conversion includes: receiving tile input data including a stream of a plurality of tiles each having a tile height, a tile input width, a macroblock width (MBW), and data bits; segmenting the tile input data based on a total number of virtual square tiles; segmenting a Tile Buffer (TB) into one or more of the virtual square tiles based on the received tile input data; and performing a raster-scanning operation on each of the segmented tile input data and the segmented TB based on the total number of virtual square tiles to generate raster data.

Abstract: In a processing system, an integrated function controller (IFC) for one or more memory devices, including a NAND flash memory device, provides direct memory access (DMA) functionality for writing data to and reading data from the NAND flash memory device, thereby reducing the level of CPU intervention required to support such operations. In one implementation, the CPU stores in system memory a descriptor-based DMA operation sequence of NAND flash operations and then triggers the IFC to implement the descriptor sequence. The IFC sequentially fetches and implements individual stored descriptors without interrupting the CPU or requiring any real-time CPU intervention using, for example, a “repeat while busy” polling descriptor type. The IFC frees up the CPU to perform other system-level operations, thereby increasing the efficiency of the processing system.

Abstract: A method and system for booting an electronic device from a NAND flash memory includes a NAND flash controller that receives an event trigger for fetching a pre-boot code stored in the NAND flash memory. Based on the event trigger type, booting parameters are loaded into the controller including a boot frequency of the NAND flash memory. The controller searches for a good memory block in which the pre-boot code is stored by checking the first and second or the first and last pages of a memory block and fetches a portion or the entire pre-boot code based on the event trigger type at the boot frequency.

Abstract: A memory controller that generates interface signals for a memory device determines an interface signal frequency based on a timing mode of the memory device and a corresponding clock division ratio. Based on the timing mode, a look up table (LUT) is selected and then a timing parameter corresponding to the clock division ratio and the interface signal frequency is fetched from the LUT. An interface signal is generated based on the interface signal frequency and fetched timing parameter.

Abstract: A method and system for booting an electronic device from a NAND flash memory includes a NAND flash controller that receives an event trigger for fetching a pre-boot code stored in the NAND flash memory. Based on the event trigger type, booting parameters are loaded into the controller including a boot frequency of the NAND flash memory. The controller searches for a good memory block in which the pre-boot code is stored by checking the first and second or the first and last pages of a memory block and fetches a portion or the entire pre-boot code based on the event trigger type at the boot frequency.