Patents by Inventor Nitin Gupta

Nitin Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150169327
    Abstract: When a main processor issues a command to co-processor, a timeout value is included in the command. As the co-processor attempts to execute the command, it is determined whether the attempt is taking time beyond what is permitted by the timeout value. If the timeout is exceeded then responsive action is taken, such as the generation of a command timeout type failure message. The receipt of the command with the timeout value, and the consequent determination of a timeout condition for the command, may be determined by: the co-processor that receives the command, or a watchdog timer that is separate from the co-processor. Also, detection of co-processor hang and/or hung co-processor conditions during the time that a co-processor is executing a command for the main processor.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 18, 2015
    Applicant: International Business Machines Corporation
    Inventors: Nitin Gupta, Mehulkumar J. Patel, Deepak C. Shetty
  • Patent number: 9058191
    Abstract: In a multiprocessor system, a primary processor may store an executable image for a secondary processor. A communication protocol assists the transfer of an image header and data segment(s) of the executable image from the primary processor to the secondary processor. Messages between the primary processor and secondary processor indicate successful receipt of transferred data, termination of a transfer process, and acknowledgement of same.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: June 16, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Nitin Gupta, Daniel H. Kim, Igor Malamant, Steve Haehnichen
  • Publication number: 20150142851
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for identifying implicit question queries. In one aspect, a method includes receiving a query in unstructured form, comparing terms of the query to query templates, determining, based on the comparison, a match of the query terms to a first query template, wherein the first query template is not determined to be indicative of a question query, determining, based on the first query template, a second query template, and determining that the query is an implicit question query in response to the second query template being indicative of a question queries.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 21, 2015
    Applicant: GOOGLE INC.
    Inventors: Nitin Gupta, Preyas Popat, Steven D. Baker, Srinivasan Venkatachary
  • Patent number: 9014012
    Abstract: A network analysis system invokes an application specific, or source-destination specific, path discovery process. The application specific path discovery process determines the path(s) used by the application, collects performance data from the nodes along the path, and communicates this performance data to the network analysis system for subsequent performance analysis. The system may also maintain a database of prior network configurations to facilitate the identification of nodes that are off the path that may affect the current performance of the application. The system may also be specifically controlled so as to identify the path between any pair of specified nodes, and to optionally collect performance data associated with the path.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: April 21, 2015
    Assignee: Riverbed Technology, Inc.
    Inventors: Vinod Jeyachandran, Pradeep Natarajan, James Mark Shaw, Raghavendra Uppalli, Pradeep Singh, Nitin Gupta, Jerrold Stiffler
  • Publication number: 20150106234
    Abstract: A system and method for the generation and presentation of candidate domain names and/or candidate name assets are presented. The method includes receiving, by at least one server communicatively coupled to a network, a request to access or purchase access to a software application, the request being received from a user. Keywords associated with at least one of the user, a website of the user, and a business of the user are generated and a candidate domain name relevant to the keywords is generated. A user interface is displayed including the candidate domain name. The user interface enables the user to register the candidate domain name. A plurality of candidate domain names may be generated and organized into carousels or stacks according to a common theme. The candidate domain names may be displayed on a user interface and arranged thereon according to a relevance score of the domain name bundles.
    Type: Application
    Filed: November 3, 2014
    Publication date: April 16, 2015
    Inventors: Tapan Kamdar, Nitin Gupta
  • Publication number: 20150106725
    Abstract: A system and method for the generation and presentation of candidate domain names are presented. The method includes receiving, by at least one server communicatively coupled to a network, a request to access or purchase access to a software application, the request being received from a user. Keywords associated with at least one of the user, a website of the user, and a business of the user are generated and a candidate domain name relevant to the keywords is generated. A user interface is displayed including the candidate domain name. The user interface enables the user to register the candidate domain name. A plurality of candidate domain names may be generated and organized into carousels or stacks according to a common theme. The candidate domain names may be displayed on a user interface and arranged thereon according to a relevance score of the domain name bundles.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 16, 2015
    Inventors: Tapan Kamdar, Garrett Matsudira, Stacy Steinkuller, Nitin Gupta, Edward J. Karcher, III
  • Patent number: 9007912
    Abstract: Serial clustering uses two or more network devices connected in series via a local and/or wide-area network to provide additional capacity when network traffic exceeds the processing capabilities of a single network device. When a first network device reaches its capacity limit, any excess network traffic beyond that limit is passed through the first network device unchanged. A network device connected in series with the first network device intercepts and will process the excess network traffic provided that it has sufficient processing capacity. Additional network devices can process remaining network traffic in a similar manner until all of the excess network traffic has been processed or until there are no more additional network devices. Network devices may use rules to determine how to handle network traffic. Rules may be based on the attributes of received network packets, attributes of the network device, or attributes of the network.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 14, 2015
    Assignee: Riverbed Technology, Inc.
    Inventors: David Tze-Si Wu, Nitin Gupta, Kand Ly
  • Patent number: 9000857
    Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: April 7, 2015
    Assignee: STMicroelectronics International N.V.
    Inventors: Abhirup Lahiri, Nitin Gupta
  • Patent number: 9000193
    Abstract: The present invention discloses a process for the preparation of 4-acetoxy-2?-benzoyloxy-5?,20-epoxy-1-hydroxy-7?,10?-dimethoxy-9-oxotax-11-en-13?-yl(2R,3S)-3-tert-butoxycarbonylamino-2-hydroxy-3-phenyl-propionate Cabazitaxel (I).
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: April 7, 2015
    Assignee: Fresenius Kabi Oncology Limited
    Inventors: Saswata Lahiri, Nitin Gupta, Abul Azim, Nilendu Panda, Bhuwan Bhaskar Mishra, Sunil Sanghani
  • Publication number: 20150082401
    Abstract: A method is provided for facilitating mutual authenticating between a server and a user of a haptic enabled device. The method comprises providing identity information of a user to a server, and in response, providing a haptic feedback output to the user corresponding to the identity information. Further, the user compares the haptic feedback output received from the server to a haptic feedback pattern as predefined by the user, to determine whether the server is authenticated or not.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 19, 2015
    Applicant: Motorola Solutions, Inc.
    Inventors: Nitin Gupta, Sundaresan Sundaram
  • Publication number: 20150057454
    Abstract: The present invention discloses a process for the preparation of 4-acetoxy-2?-benzoyloxy-5?,20-epoxy-1-hydroxy-7?,10?-dimethoxy-9-oxotax-11-en-13?-yl(2 R,35)-3-tert-butoxycarbonylamino-2-hydroxy-3-phenyl-propionate Cabazitaxel (I).
    Type: Application
    Filed: November 5, 2014
    Publication date: February 26, 2015
    Inventors: Saswata Lahiri, Nitin Gupta, Abul Azim, Nilendu Panda, Bhuwan Bhaskar Mishra, Sunil Sanghani
  • Patent number: 8933737
    Abstract: A variable frequency clock generator. In aspects, a clock generator includes a droop detector circuit configured to monitor a voltage supply to an integrated circuit. If the supply voltage falls below a specific threshold, a droop voltage flag may be set such that a frequency-locked loop is triggered into a droop voltage mode for handling the voltage droop at the supply voltage. In response, a current control signal that is input to an oscillator that generates a system clock signal is reduced by sinking current away from the current control signal to the oscillator. This results in an immediate reduction on the system clock frequency. Such a state remains until the voltage droop has dissipated when the current path is removed for sinking some of the current.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: January 13, 2015
    Assignees: STMicroelectronics International N.V., STMicroelectronics (Crolles 2) SAS
    Inventors: Kallol Chatterjee, Nitin Agarwal, Junaid Yousuf, Nitin Gupta, Pierre Dautriche
  • Publication number: 20150002197
    Abstract: A variable frequency clock generator. In aspects, a clock generator includes a droop detector circuit configured to monitor a voltage supply to an integrated circuit. If the supply voltage falls below a specific threshold, a droop voltage flag may be set such that a frequency-locked loop is triggered into a droop voltage mode for handling the voltage droop at the supply voltage. In response, a current control signal that is input to an oscillator that generates a system clock signal is reduced by sinking current away from the current control signal to the oscillator. This results in an immediate reduction on the system clock frequency. Such a state remains until the voltage droop has dissipated when the current path is removed for sinking some of the current.
    Type: Application
    Filed: October 4, 2013
    Publication date: January 1, 2015
    Applicants: STMicroelectronics International N.V., STMicroelectronics (CROLLES 2) SAS
    Inventors: Kallol CHATTERJEE, Nitin AGARWAL, Junaid YOUSUF, Nitin GUPTA, Pierre DAUTRICHE
  • Publication number: 20140368281
    Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.
    Type: Application
    Filed: June 17, 2013
    Publication date: December 18, 2014
    Inventors: Abhirup Lahiri, Nitin Gupta
  • Publication number: 20140358940
    Abstract: Methods and apparatus related to identifying a query template that includes one or more terms and a member of an entity category and ranking the query template. Query suggestions may be determined based on the query template. The ranking of the query template may be utilized to determine if the query template is a valid query template. The ranking of the template may be based on at least a count of occurrences of one or more of the entities of the entity category in past queries that conform to the query template.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 4, 2014
    Inventors: Nitin Gupta, Renshen Wang, Mangesh Gupte
  • Publication number: 20140359096
    Abstract: Systems and methods for configuring applications and resources on distributed nodes or machines are disclosed. A node exposes a synchronization resource that corresponds to a desired state on a remote resource. The node evaluates a state of the remote resource. A test function may be defined to check whether the remote resource is in the desired state. A set function may also be defined to set a state of the synchronization resource when the remote resource is in the desired state. The node configures the synchronization resource when the remote resource is in the desired state. The synchronization resource may be configured, for example, using a resource provider. The node may evaluate the states of a plurality remote resources. The synchronization resource may be configured when one or more of the remote resources are in the desired state or when all of the remote resources are in the desired state.
    Type: Application
    Filed: June 18, 2013
    Publication date: December 4, 2014
    Inventors: Bruce G. Payette, Narayanan Lakshmanan, Nitin Gupta, Xuejian Pan, Sharath Gopalappa
  • Patent number: 8901327
    Abstract: The present invention discloses a process for the preparation of 4-acetoxy-2?-benzoyloxy-5?,20-epoxy-1-hydroxy-7?,10?-dimethoxy-9-oxotax-11-en-13?-yl(2R,3S)-3-tert-butoxycarbonylamino-2-hydroxy-3-phenyl-propionate Cabazitaxel (I).
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: December 2, 2014
    Assignee: Fresenius Kabi Oncology Limited
    Inventors: Saswata Lahiri, Nitin Gupta, Abul Azim, Nilendu Panda, Bhuwan Bhaskar Mishra, Sunil Sanghani
  • Publication number: 20140304302
    Abstract: A computer system and computer implemented method that obtains coordinated results from at least two queries by utilizing context data of each query. Specifically, the computer system and computer implemented method facilitates enhanced querying functionality by matching entangled queries to achieve coordinated results.
    Type: Application
    Filed: August 15, 2011
    Publication date: October 9, 2014
    Applicant: Cornell University
    Inventors: Johannes Gehrke, Christoph Koch, Lucja Kot, Nitin Gupta
  • Publication number: 20140300386
    Abstract: A level shifting circuit includes a first inverter including a pair of transistors of opposite conductivity type, the first inverter adapted to receive an input signal in a first voltage domain and further including at least one additional transistor driven by a voltage in a second voltage domain. A second inverter is coupled in series with the first inverter and operable to generate an output signal in the second voltage domain. The second inverter includes a pair of transistors of opposite conductivity type, and further includes at least one additional transistor driven by a voltage in the first voltage domain. The additional transistors are operable to approximately equalize the fall times of output signals generated by the first and second inverters.
    Type: Application
    Filed: March 31, 2014
    Publication date: October 9, 2014
    Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Nitin JAIN, Nitin GUPTA
  • Patent number: 8838949
    Abstract: In a multi-processor system, an executable software image including an image header and a segmented data image is scatter loaded from a first processor to a second processor. The image header contains the target locations for the data image segments to be scatter loaded into memory of the second processor. Once the image header has been processed, the data segments may be directly loaded into the memory of the second processor without further CPU involvement from the second processor.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: September 16, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Nitin Gupta, Daniel H. Kim, Igor Malamant, Steve Haehnichen