Abstract: A clock buffer for a clock network that reduces leakage current and lowers power consumption. The clock buffer includes a first CMOS transistor, a second CMOS transistor, and a leakage current prevention circuit connected to the first and second CMOS transistors. The leakage current prevention circuit includes a first PMOS transistor, which is connected between the source of a PMOS transistor of the first CMOS transistor and a power supply line, and a second PMOS transistor, which is connected between the source of a PMOS transistor of the second CMOS transistor and the power supply line. The first and second PMOS transistors are deactivated in response to an enable signal generated when a circuit block does not require the clock signal. The first and the second PMOS transistors have predefined widths and lengths such that the addition of these transistors in series with the CMOS transistors does not increase the propagation delay of the clock buffer circuit.

Abstract: A clock buffer for a clock network that reduces leakage current and lowers power consumption. The clock buffer includes a first CMOS transistor, a second CMOS transistor, and a leakage current prevention circuit connected to the first and second CMOS transistors. The leakage current prevention circuit includes a first PMOS transistor, which is connected between the source of a PMOS transistor of the first CMOS transistor and a power supply line, and a second PMOS transistor, which is connected between the source of a PMOS transistor of the second CMOS transistor and the power supply line. The first and second PMOS transistors are deactivated in response to an enable signal generated when a circuit block does not require the clock signal. The first and the second PMOS transistors have predefined widths and lengths such that the addition of these transistors in series with the CMOS transistors does not increase the propagation delay of the clock buffer circuit.

Abstract: A system, method, and computer program product for improving physical lock acquisition for database transaction logs are described herein. In an embodiment, the method operates by receiving a request for a transaction log page and determining whether a requested log page is newly-allocated or already exists. A determination is made regarding whether the last log page is being modified. A physical lock is taken on the requested log page when it has been determined that the requested log page is not newly-allocated and that the last log page is not being modified. Operations on the last log page are synchronized without a physical lock when it is determined that the requested log page is newly-allocated or that the last log page is being modified.

Abstract: A system, method, and computer program product for improving physical lock acquisition for database transaction logs are described herein. In an embodiment, the method operates by receiving a request for a transaction log page and determining whether a requested log page is newly-allocated or already exists. A determination is made regarding whether the last log page is being modified. A physical lock is taken on the requested log page when it has been determined that the requested log page is not newly-allocated and that the last log page is not being modified. Operations on the last log page are synchronized without a physical lock when it is determined that the requested log page is newly-allocated or that the last log page is being modified.