Patents by Inventor Nizar Rida

Nizar Rida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120327958
    Abstract: A device demultiplexes an optical signal to produce a number of client streams for client devices. The device produces overhead packets for the client devices. The overhead packets are sent using a packet interface on the device. The overhead packets are sent to the client devices with a Virtual Local Area Network Identification (VLAN ID) portion of the overhead packets identify a client device of the client devices.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 27, 2012
    Applicant: EXAR CORPORATION
    Inventors: ILIAN SEVDALINOV TZVETANOV, NIZAR RIDA
  • Patent number: 7305014
    Abstract: A flexible and expandable system bus for connecting traffic mapping devices to SONET/SDH framing devices. The system bus passes control signals generated by a master device to multiple tributaries to orient them relative to a SONET/SDH frame. These control signals obviate the need for each tributary to perform its own SONET/SDH reconstruction and framing using the A1/A2 bytes. The control signals synchronize the tributaries to a common clock cycle, indicate during which clock cycles the tributary can add or drop data relative to the system bus, and an interface identification signal that transmits values on the system bus. The tributaries monitor the values on the system bus, and when the value associated with each tributary appears on the bus, and the system bus indicates that the current clock cycle is within the SPE portion of the SONET/SDH frame, the tributary adds or drops data relative to the system bus.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: December 4, 2007
    Inventors: David Kirk, Erik Trounce, Matthew Coakeley, Nizar Rida, Ingrid Zorgdrager
  • Patent number: 6920604
    Abstract: Systems and methods for encoding and decoding serial bit streams are provided. A parity bit is computed for each nibble, with the parity alternating between odd and even in a regular manner for normal data, and with parity having predetermined different patterns to indicate the start of a packet or the end of a packet. Special code words indicate the idle state and an error state. In some systems an extra vertical parity channel is provided in association with a group of data channels, the vertical parity channel effectively providing a protection channel.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: July 19, 2005
    Assignee: Galazar Networks, Inc.
    Inventors: Matthew Coakeley, Erik Trounce, David Kirk, Michael Vandegriend, Richard DeBoer, Nizar Rida
  • Publication number: 20040213282
    Abstract: A flexible and expandable system bus for connecting traffic mapping devices to SONET/SDH framing devices. The system bus passes control signals generated by a master device to multiple tributaries to orient them relative to a SONET/SDH frame. These control signals obviate the need for each tributary to perform its own SONET/SDH reconstruction and framing using the A1/A2 bytes. The control signals synchronize the tributaries to a common clock cycle, indicate during which clock cycles the tributary can add or drop data relative to the system bus, and an interface identification signal that transmits values on the system bus. The tributaries monitor the values on the system bus, and when the value associated with each tributary appears on the bus, and the system bus indicates that the current clock cycle is within the SPE portion of the SONET/SDH frame, the tributary adds or drops data relative to the system bus.
    Type: Application
    Filed: April 22, 2003
    Publication date: October 28, 2004
    Inventors: David Kirk, Erik Trounce, Matthew Coakeley, Nizar Rida, Ingrid Zorgdrager
  • Publication number: 20040093552
    Abstract: Systems and methods for encoding and decoding serial bit streams are provided. A parity bit is computed for each nibble, with the parity alternating between odd and even in a regular manner for normal data, and with parity having predetermined different patterns to indicate the start of a packet or the end of a packet. Special code words indicate the idle state and an error state. In some systems an extra vertical parity channel is provided in association with a group of data channels, the vertical parity channel effectively providing a protection channel.
    Type: Application
    Filed: April 8, 2002
    Publication date: May 13, 2004
    Inventors: Matthew Coakeley, Erik Trounce, David Kirk, Michael Vandegriend, Richard DeBoer, Nizar Rida
  • Publication number: 20030192006
    Abstract: Systems and methods for encoding and decoding serial bit streams are provided. A parity bit is computed for each nibble, with the parity alternating between odd and even in a regular manner for normal data, and with parity having predetermined different patterns to indicate the start of a packet or the end of a packet. Special code words indicate the idle state and an error state. In some systems an extra vertical parity channel is provided in association with a group of data channels, the vertical parity channel effectively providing a protection channel.
    Type: Application
    Filed: April 8, 2002
    Publication date: October 9, 2003
    Inventors: Matthew Coakeley, Erik Trounce, David Kirk, Michael Vandegriend, Richard DeBoer, Nizar Rida