Abstract: A circuit for generating a digital noise signal characterized by an evenly distributed frequency content for a particular frequency bandwidth of the digital noise signal includes a word signal generator for generating a random sequence of N-bit digital word signals with each cycle of a system clock signal provided to the word signal generator, where N is a non-zero integer. The noise generating circuit further includes a shaping circuit which transforms the random sequence into a shaped sequence of N-bit digital word signals, and a frequency synthesizer which is responsive to the shaped sequence and which generates the digital noise signal.

Abstract: A digital signature built-in-test (BIT) device for testing a digital circuit includes circuitry for compressing test data received from the digital circuit. The test data compressing circuitry may include one or more linear feedback shift registers (LFSR), which compresses the test data and supplies a signature data word corresponding to the test data compressed. Circuitry for enabling the test data compressing circuitry for a predetermined period of time is also included. The enabling circuitry provides an enabling signal to the test data compressing circuitry. The signature data word from the test data compressing circuitry is stored in a buffer memory circuit. Control data is received by the digital signature BIT device from a remote processor. The control data is received and processed by a control circuit, which circuit supplies control signals to the test data compressing circuitry, signature data word storing circuitry and the enabling circuitry.