Abstract: A logic circuit in a processor including a plurality of input registers, each for storing a vector containing data elements, a coefficient register for storing a vector containing N coefficients, an output register for storing a result vector, and an arithmetic unit configured to: obtain a pattern for selecting N data elements from the plurality of input registers, select a plurality of groups of N data elements from the plurality of input registers in parallel, wherein each group is selected in accordance with the pattern, and wherein each group is shifted with respect to a previous selected group, perform an arithmetic operation between each of the selected groups and the coefficients in parallel, and store results of the arithmetic operations in the output register.

Abstract: A logic circuit in a processor including a plurality of input registers, each for storing a vector containing data elements, a coefficient register for storing a vector containing N coefficients, an output register for storing a result vector, and an arithmetic unit configured to: obtain a pattern for selecting N data elements from the plurality of input registers, select a plurality of groups of N data elements from the plurality of input registers in parallel, wherein each group is selected in accordance with the pattern, and wherein each group is shifted with respect to a previous selected group, perform an arithmetic operation between each of the selected groups and the coefficients in parallel, and store results of the arithmetic operations in the output register.

Abstract: Device and method for writing Discrete Fourier transform (DFT) samples in a memory in a reorder stage, the memory includes memory banks, each having a dedicated address generator. The method includes: dividing the DFT samples into R(reorder) equally sized segments, where R(reorder) is the radix value of the reorder stage of the DFT; checking whether a number of butterfly computations per cycle of a reorder stage of the DFT operation times R(reorder), denoted as P, is not larger than the number of segments; if P is larger than the number of segments: further dividing the segments or sub-segments into X equally sized sub-segments, where X is a radix value of a next stage of the DFT operation until P is not larger than the number of sub-segments; and mapping the sub-segments to the memory, each in a separate row, with an offset that includes segment offset and sub-segment offset.

Abstract: A method and system for soft output multiple-input-multiple-output (MIMO) decoding may include generating a tree-graph based on: MIMO rank, number of bits per layer, and type of modulation, wherein the tree-graph comprises a root node, leaf nodes, nodes, and branches connecting the nodes; performing sphere decoding by determining a radius covering a subset of nodes within said tree-graph; managing, based on the sphere decoding, tables comprising metrics and counter metrics usable for log likelihood ratio (LLR) generation; predicting, based on a specified prediction scheme, counter metrics for paths in the tree-graph that comprise nodes and branches out of the determined radius; and updating the tables comprising the counter metrics with the predicted counter metric, in a case that the predicted counter metrics are better in maximum likelihood terms than the determined counter metrics.

Abstract: A decoder to search a tree graph to decode a received signal. The tree graph may have a plurality of levels, each level having a plurality of nodes and each node representing a different value of an element of a candidate transmit signal corresponding to the received signal. The decoder may include a first module to execute a branch prediction at each branch node to select one of a plurality of candidate nodes stemming from the branch node that has a smallest distance increment, and a second module, running in parallel to the first module, to evaluate the branch prediction made by the first module at each branch node by computing an accumulated distance of the selected node. If the accumulated distance of the selected node is greater than or equal to a search radius, the first module may override the branch prediction and select an alternative candidate node.

Abstract: A method and system for soft output multiple-input-multiple-output (MIMO) decoding may include generating a tree-graph based on: MIMO rank, number of bits per layer, and type of modulation, wherein the tree-graph comprises a root node, leaf nodes, nodes, and branches connecting the nodes; performing sphere decoding by determining a radius covering a subset of nodes within said tree-graph; managing, based on the sphere decoding, tables comprising metrics and counter metrics usable for log likelihood ratio (LLR) generation; predicting, based on a specified prediction scheme, counter metrics for paths in the tree-graph that comprise nodes and branches out of the determined radius; and updating the tables comprising the counter metrics with the predicted counter metric, in a case that the predicted counter metrics are better in maximum likelihood terms than the determined counter metrics.

Abstract: Device and method for writing Discrete Fourier transform (DFT) samples in a memory in a reorder stage, the memory includes memory banks, each having a dedicated address generator. The method includes: dividing the DFT samples into R(reorder) equally sized segments, where R(reorder) is the radix value of the reorder stage of the DFT; checking whether a number of butterfly computations per cycle of a reorder stage of the DFT operation times R(reorder), denoted as P, is not larger than the number of segments; if P is larger than the number of segments: further dividing the segments or sub-segments into X equally sized sub-segments, where X is a radix value of a next stage of the DFT operation until P is not larger than the number of sub-segments; and mapping the sub-segments to the memory, each in a separate row, with an offset that includes segment offset and sub-segment offset.

Abstract: A decoder to search a tree graph to decode a received signal y. The tree graph may have a plurality of levels, each level having a plurality of nodes and each node representing a different value of an element of a candidate transmit signal s corresponding to the received signal y. The decoder may include a first module to execute a branch prediction at each branch node of the tree graph to select one of a plurality of candidate nodes stemming from the branch node that has a smallest distance increment. The decoder may include a second module, running in parallel to the first module, to evaluate the branch prediction made by the first module at each branch node by computing an accumulated distance of the selected node. If the accumulated distance of the selected node is greater than or equal to a search radius, the first module may override the branch prediction and select an alternative candidate node.

Abstract: A system and method may execute a branch instruction in a program. The branch instruction may be received defining a plurality of different possible instruction paths. Instructions for an initial predefined one of the paths may be automatically retrieved from a program memory while the correct path is being determined. If the initial path is determined to be correct, the instructions retrieved for the initial path may continue to be processed and if a different path is determined to be correct, instructions from a stored reserve of instructions may be processed for the different path to supply the program with enough correct path instructions to run the program at least until the program retrieves the correct path instructions from the program memory to recover from taking the incorrect path. The system and method may recover from taking the incorrect path with zero computational penalty.