Patents by Inventor Noam ELATI

Noam ELATI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11831742
    Abstract: Methods, apparatus, and systems for implementing a semi-flexible Receive Segment Coalescing (RSC) control path. Logic for evaluating packet coalescing open flow criteria and close flow criteria are implemented in hardware on a network device that receives packets from one or more networks. packet coalescing open profiles and packet coalescing close profiles are also stored on the network device, wherein each packet coalescing open profile defines a set of packet coalescing open flow criteria to be applied for that packet coalescing open profile and each packet coalescing close profile defines a set of packet coalescing close flow criteria to be applied for that packet coalescing open profile. packet coalescing open flow and close flow profiles are then assigned to packet coalescing-enabled receive queues on the network device and corresponding open and flow criteria are used to perform packet coalescing-related processing of packets in the receive queues.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Linden Cornett, Anjali Singhai Jain, Noam Elati
  • Patent number: 11805081
    Abstract: Packets received non-contiguously from a network are processed by a network interface controller by coalescing received packet payload into receive buffers on a receive buffer queue and writing descriptors associated with the receive buffers for a same flow consecutively in a receive completion queue. System performance is optimized by reusing a small working set of provisioned receive buffers to minimize the memory footprint of memory allocated to store packet data. The remainder of the provisioned buffers are in an overflow queue and can be assigned to the network interface controller if the small working set of receive buffers is not sufficient to keep up with the received packet rate. The receive buffer queue can be refilled based on either timers or when the number of buffers in the receive buffer queue is below a configurable low watermark.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: October 31, 2023
    Assignee: Intel Corporation
    Inventors: Linden Cornett, Noam Elati, Anjali Singhai Jain, Parthasarathy Sarangam, Eliel Louzoun, Manasi Deval
  • Publication number: 20230333921
    Abstract: Examples described herein relate to a host interface and circuitry. In some examples, the circuitry, when coupled to a physical device, is to: perform operations of a hypervisor. In some examples, the host interface is configured to route first communications to the circuitry instead of the physical device and route second communications to the physical device. In some examples, the physical device is accessible as a virtual device via the host interface.
    Type: Application
    Filed: February 21, 2023
    Publication date: October 19, 2023
    Inventors: Noam ELATI, Piotr UMINSKI, Boris KLEIMAN, Lloyd DCRUZ, Bradley A. BURRES, Salma Mirza JOHNSON, Thomas E. WILLIS, Duane E. GALBI
  • Publication number: 20230050776
    Abstract: A circuitry of a network interface device of a computing network is to: access a first message from a server architecture of the computing network, the first message including a timestamp based on a time at which the circuitry is to access, from a host memory, one or more data packet descriptors that correspond to a data packet to be transmitted to the computing network from the network interface device; send, for transmission to the server architecture and at a transmission time based on the timestamp, a second message, the second message including a request to access the one or more data packet descriptors; and subsequent to sending the second message for transmission, access the one or more data packet descriptors to determine one or more addresses for the data packet in the host memory.
    Type: Application
    Filed: September 30, 2022
    Publication date: February 16, 2023
    Applicant: Intel Corporation
    Inventors: Sarig Livne, Noam Elati, Yotam Nizri, Gregory Nizan Miron
  • Publication number: 20230019974
    Abstract: A network device can place some or all of the packet processing pipeline into a low-power state for detected idle intervals of sufficient duration. The network device detects idleness greater than a critical duration and automatically engages a low-power mode involving clock throttling and/or clock gating. The power savings in the packet processing pipeline in the network device is based on the average long-term residency in idleness. The idle power is reduced for the packet processing pipeline in the network device by detecting average long-term idleness as a function of the minimum latency of the packet processing pipeline, which is used to reduce the clock rate of the packet processing pipeline, thereby resulting in power savings for the network device.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 19, 2023
    Inventors: Srinivasan S. IYENGAR, Erik MCSHANE, Edward HO, Noam ELATI
  • Publication number: 20220141133
    Abstract: An apparatus, a method, and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Inventors: Eliel LOUZOUN, Manasi DEVAL, Stephen DOYLE, Noam ELATI, Patrick FLEMING, Gregory BOWERS
  • Publication number: 20220086226
    Abstract: Examples described herein relate to a network interface device comprising: a device interface; at least one processor; a direct memory access (DMA) device; and a packet processing circuitry. In some examples, the at least one processor, when operational, is configured to: in connection with a first operation: perform a format translation of a first descriptor from a first format associated with an emulated device to a second format associated with the packet processing circuitry and provide, to the packet processing circuitry, the translated first descriptor. In some examples, the at least one processor, when operational, is configured to: in connection with a second operation: perform a descriptor format translation of a second descriptor from the second format associated with the packet processing circuitry to the first format associated with the emulated software device and provide, to the emulated device, the translated second descriptor.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 17, 2022
    Inventors: Anjali Singhai JAIN, Noam ELATI, Eliel LOUZOUN, Daniel DALY
  • Patent number: 11271856
    Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Eliel Louzoun, Manasi Deval, Stephen Doyle, Noam Elati, Patrick Fleming, Gregory Bowers
  • Publication number: 20220006750
    Abstract: Examples described herein relate to a network interface device comprising a packet transmission scheduler. In some examples, the packet transmission scheduler is to: perform packet transmit arbitration among nodes, wherein based on a first node of the nodes having transmission paused by flow control, the perform packet transmit arbitration among nodes comprises retain relative priority of a packet departure time for the first node with respect to a second packet departure time associated with a second node of the nodes during a duration of flow control. In some examples, retaining relative priority of a packet departure time for the first node with respect to a second packet departure time associated with a second node of the nodes during a duration of flow control comprises adjust the packet departure time and the second packet departure time to stay within a time window but not rollover.
    Type: Application
    Filed: September 14, 2021
    Publication date: January 6, 2022
    Inventors: Sarig LIVNE, Noam ELATI, Hemanth KRISHNAN, Venkidesh KRISHNA IYER, Adam CONYERS, Michael G. LEFEVRE
  • Publication number: 20210328945
    Abstract: Examples described herein relate to a network interface device comprising circuitry to: allocate a first number of buffers to store received packets associated with a first descriptor ring; allocate a second number of buffers to store received packets associated with a second descriptor ring; and based on receipt of a packet, copy the received packet into a number of buffers based on whether the received packet is associated with the first descriptor ring or the second descriptor ring. In some examples, the circuitry is to copy the received packet starting at an offset from a start of a starting buffer in a number of buffers, wherein the offset is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring and wherein the number of buffers is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring.
    Type: Application
    Filed: June 26, 2021
    Publication date: October 21, 2021
    Inventors: Noam ELATI, Boris KLEIMAN, Piotr UMINSKI
  • Patent number: 10951475
    Abstract: Technologies for performing dynamic configurations to a transmit scheduler of a network device with minimal downtime are disclosed. The transmit scheduler includes a topology of scheduling nodes. The transmit scheduler identifies, from a number of configuration operations to be executed on one or more of the scheduling nodes, one or more first configuration operations to be executed while the scheduling nodes are active, one or more second configuration operations to be executed while the scheduling nodes are inactive, and one or more third configuration operations to be executed via a cache. The first operations are executed as part of a background process. The second operations are executed while the scheduling nodes are inactive. The third operations are executed via the cache.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Sarig Livne, Ben-Zion Friedman, Noam Elati
  • Publication number: 20200210359
    Abstract: Examples described herein relate to a device indicating a number of available interrupt messages that is more than physical resources available to store the available interrupt messages and allocating one or more physical resources to provide one or more interrupt messages based on allocation of the one or more interrupt messages to a destination entity. The destination entity can request a maximum permitted allocation of interrupt messages regardless of interrupt message use level. The destination entity can request a maximum permitted allocation of interrupt messages regardless of interrupt message use level and allocate the requested maximum permitted allocation of interrupt messages for use in a configuration region of a device. However, based on unavailability of a physical resource to store a first interrupt message, allocation of the first interrupt message to a destination entity may not be permitted.
    Type: Application
    Filed: March 10, 2020
    Publication date: July 2, 2020
    Inventors: Linden CORNETT, Eliel LOUZOUN, Anjali Singhai JAIN, Ronen Aharon HYATT, Danny VOLKIND, Noam ELATI, Nadav TURBOVICH
  • Publication number: 20200204503
    Abstract: Packets received non-contiguously from a network are processed by a network interface controller by coalescing received packet payload into receive buffers on a receive buffer queue and writing descriptors associated with the receive buffers for a same flow consecutively in a receive completion queue. System performance is optimized by reusing a small working set of provisioned receive buffers to minimize the memory footprint of memory allocated to store packet data. The remainder of the provisioned buffers are in an overflow queue and can be assigned to the network interface controller if the small working set of receive buffers is not sufficient to keep up with the received packet rate. The receive buffer queue can be refilled based on either timers or when the number of buffers in the receive buffer queue is below a configurable low watermark.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Inventors: Linden CORNETT, Noam ELATI, Anjali Singhai JAIN, Parthasarathy SARANGAM, Eliel LOUZOUN, Manasi DEVAL
  • Publication number: 20200120190
    Abstract: Methods, apparatus, and systems for implementing a semi-flexible Receive Segment Coalescing (RSC) control path. Logic for evaluating packet coalescing open flow criteria and close flow criteria are implemented in hardware on a network device that receives packets from one or more networks. packet coalescing open profiles and packet coalescing close profiles are also stored on the network device, wherein each packet coalescing open profile defines a set of packet coalescing open flow criteria to be applied for that packet coalescing open profile and each packet coalescing close profile defines a set of packet coalescing close flow criteria to be applied for that packet coalescing open profile. packet coalescing open flow and close flow profiles are then assigned to packet coalescing-enabled receive queues on the network device and corresponding open and flow criteria are used to perform packet coalescing-related processing of packets in the receive queues.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 16, 2020
    Inventors: Linden Cornett, Anjali Singhai Jain, Noam Elati
  • Publication number: 20190356589
    Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments.
    Type: Application
    Filed: May 17, 2019
    Publication date: November 21, 2019
    Inventors: Eliel Louzoun, Manasi Deval, Stephen Doyle, Noam Elati, Patrick Fleming, Gregory Bowers
  • Publication number: 20190327132
    Abstract: Technologies for performing dynamic configurations to a transmit scheduler of a network device with minimal downtime are disclosed. The transmit scheduler includes a topology of scheduling nodes. The transmit scheduler identifies, from a number of configuration operations to be executed on one or more of the scheduling nodes, one or more first configuration operations to be executed while the scheduling nodes are active, one or more second configuration operations to be executed while the scheduling nodes are inactive, and one or more third configuration operations to be executed via a cache. The first operations are executed as part of a background process. The second operations are executed while the scheduling nodes are inactive. The third operations are executed via the cache.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 24, 2019
    Inventors: Sarig Livne, Ben-Zion Friedman, Noam Elati
  • Publication number: 20190158429
    Abstract: Techniques to use descriptors for packet transmit scheduling include grouping a plurality of data descriptors associated with blocks of data with a single descriptor. The single descriptor to include information related to the plurality of data descriptors. The single descriptor to be used to schedule transmission of the blocks of data from a computing platform.
    Type: Application
    Filed: January 29, 2019
    Publication date: May 23, 2019
    Inventors: Ben-Zion FRIEDMAN, Noam ELATI, Sarig LIVNE