Patents by Inventor Noam Katz Abramovich

Noam Katz Abramovich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10462075
    Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 29, 2019
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Freddy Gabbay, Ido Bukshpan, Alon Webman, Miriam Menes, George Elias, Noam Katz Abramovich
  • Publication number: 20170201468
    Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
    Type: Application
    Filed: March 28, 2017
    Publication date: July 13, 2017
    Inventors: Freddy Gabbay, Ido Bukshpan, Alon Webman, Miriam Menes, George Elias, Noam Katz Abramovich
  • Patent number: 9699095
    Abstract: Communication apparatus includes multiple ports for connection to a packet data network. A memory contains, for each port, a respective first, fixed headroom allocation to hold packets received from the network through the port and to contain a shared headroom buffer, which is available to be shared among a plurality of the ports. Flow-control logic allocates to each of the ports, within the shared headroom buffer, a respective second, variable headroom allocation, which varies responsively to fill levels of the respective first headroom allocation and of the shared headroom buffer, thereby defining, for each of the ports, a respective total headroom allocation comprising the respective first and second headroom allocations. The logic is configured to apply flow-control operations in response to the packets received from the network through each port responsively to a total fill level of the respective total headroom allocation of the port.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: July 4, 2017
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: George Elias, Ido Bukspan, Noam Katz Abramovich, Barak Gafni
  • Patent number: 9641465
    Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 2, 2017
    Assignee: Mellanox Technologies, Ltd
    Inventors: Freddy Gabbay, Ido Bukshpan, Alon Webman, Miriam Menes, George Elias, Noam Katz Abramovich
  • Patent number: 9584429
    Abstract: A method for communication includes storing packets received from a sending node over a communication link in a receive buffer of a receiving node. The receive buffer includes one or more blocks having a first block size. A first credit count, corresponding to a number of available blocks in the receive buffer, is derived. The first credit count is converted to a second credit count so as to represent an available space in the receive buffer in accordance with a second block size, which is different from the first block size. A transmission rate of the sending node is controlled by publishing the second credit count to the sending node over the communication link.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: February 28, 2017
    Assignee: MELLANOX TECHNOLOGIES LTD.
    Inventors: Zachy Haramaty, Roy Kriss, Noam Katz Abramovich, George Elias, Ran Ravid
  • Publication number: 20160344636
    Abstract: Communication apparatus includes multiple ports for connection to a packet data network. A memory contains, for each port, a respective first, fixed headroom allocation to hold packets received from the network through the port and to contain a shared headroom buffer, which is available to be shared among a plurality of the ports. Flow-control logic allocates to each of the ports, within the shared headroom buffer, a respective second, variable headroom allocation, which varies responsively to fill levels of the respective first headroom allocation and of the shared headroom buffer, thereby defining, for each of the ports, a respective total headroom allocation comprising the respective first and second headroom allocations. The logic is configured to apply flow-control operations in response to the packets received from the network through each port responsively to a total fill level of the respective total headroom allocation of the port.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 24, 2016
    Inventors: George Elias, Ido Bukspan, Noam Katz Abramovich, Barak Gafni
  • Patent number: 9325641
    Abstract: A switching apparatus includes multiple ports, each including a respective buffer, and a switch controller. The switch controller is configured to concatenate the buffers of at least an input port and an output port selected from among the multiple ports for buffering traffic of a long-haul link, which is connected to the input port and whose delay exceeds buffering capacity of the buffer of the input port alone, and to carry out end-to-end flow control for the long haul link between the output port and the input port.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: April 26, 2016
    Assignee: MELLANOX TECHNOLOGIES LTD.
    Inventors: Zachy Haramaty, Noam Katz Abramovich, George Elias, Ido Bukspan, Benny Koren, Gil Bloch
  • Publication number: 20160021016
    Abstract: A method for communication includes storing packets received from a sending node over a communication link in a receive buffer of a receiving node. The receive buffer includes one or more blocks having a first block size. A first credit count, corresponding to a number of available blocks in the receive buffer, is derived. The first credit count is converted to a second credit count so as to represent an available space in the receive buffer in accordance with a second block size, which is different from the first block size. A transmission rate of the sending node is controlled by publishing the second credit count to the sending node over the communication link.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 21, 2016
    Inventors: Zachy Haramaty, Roy Kriss, Noam Katz Abramovich, George Elias, Ran Ravid
  • Publication number: 20150263994
    Abstract: A switching apparatus includes multiple ports, each including a respective buffer, and a switch controller. The switch controller is configured to concatenate the buffers of at least an input port and an output port selected from among the multiple ports for buffering traffic of a long-haul link, which is connected to the input port and whose delay exceeds buffering capacity of the buffer of the input port alone, and to carry out end-to-end flow control for the long haul link between the output port and the input port.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 17, 2015
    Applicant: Mellanox Technologies Ltd.
    Inventors: Zachy Haramaty, Noam Katz Abramovich, George Elias, Ido Bukspan, Benny Koren, Gil Bloch