Abstract: A vertical wafer heat treatment apparatus for for forming a film on and dry etching a plurality of wafers stored in a wafer boat. The apparatus has at least first and second load lock chambers connected by a gate. Each load lock has an inert gas independently introduced therein and exhausted therefrom. The load lock chambers are vertically connected between two separate process containers. An elevator is provided in the first load lock chamber to transfer a wafer boat into and out of the first container. A transfer means is provided in the second load lock to transfer wafers into and out of a wafer boat.

Abstract: A treatment apparatus used in manufacturing processes for semiconductor devices and the like, in which substrates are treated by means of a reaction gas. An inner tube, which is coaxially disposed in a reaction tube, defines a reaction region surrounding the substrates to be treated. The inner tube has a number of perforations in its wall, by means of which the inside and outside of the reaction region communicate with each other. During reaction treatment, the reaction gas is supplied to the reaction region, while a cleaning gas is supplied to the region outside the reaction region. Both these gases are discharged through a common exhaust pipe. The flows of the reaction gas and the cleaning gas are controlled so that the pressure inside the reaction region is higher than the pressure outside the region. As the cleaning gas is supplied, production and adhesion of reaction compound particles on the inner surface of the reaction tube is prevented.

Abstract: A vertical type heat-treating apparatus has a process tube, disposed upright along the lengthwise direction, for receiving a target object to heat-treat it under a predetermined condition, and a heater, provided around the process tube, for heating the target object in the process tube. After heat treatment is executed with the heater disposed around the process tube, the heater is moved upward by an elevator away from the process tube for cooling down the inside of the process tube.

Abstract: A junction type field effect transistor comprises a semiconductor layer of one conductivity type acting as a drain region, a source region of said one conductivity type formed to a prescribed depth from the surface of the semiconductor layer, an insulation layer formed to a prescribed depth from the surface of the semiconductor layer to surround the source region, and a gate region of the opposite conductivity type formed in the proximity of the sorce region. The insulation layer and source region are formed to substantially the same depth.

Abstract: A vertical type junction field effect transistor is disclosed having a body of semiconductor material of a first conductive type, a source region of the first conductive type provided in a main face of the body and a drain region of the first conductive type disposed opposite to the source region. A gate region of a second conductive type opposite to the first conductive type is disposed in direct contact with the source region and surrounds the source region in the form of a closed loop. A channel region extends from the source region towards the drain region and has a varying width in the vicinity of the source region according to the change of a depletion layer upon voltage application to the gate region.