Abstract: A gate drive circuit that drives a switching element including a first drain, a first source, and a first gate includes: a first terminal to which a gate control signal is input; a gate signal line connecting the first terminal and the first gate; a resistance element inserted in the gate signal line; a capacitance element connected in parallel with the resistance element; a clamp circuit that performs a clamp operation of clamping a voltage between the first gate and the first source to a voltage lower than a threshold voltage of the switching element when the gate control signal indicates an off period of the switching element; and a clamp control circuit that controls whether to prohibit the clamp operation of the clamp circuit in the off period.

Abstract: A gate drive circuit that drives a power device by controlling charge and discharge of gate capacitance of the power device includes: a first semiconductor switch that charges the gate capacitance by being brought into conduction according to a first control signal; a second semiconductor switch that discharges the gate capacitance by being brought into conduction according to a second control signal; and a slew rate control circuit that is connected between a gate of the power device and a ground line, and controls a slew rate during discharge. The slew rate control circuit includes a capacitor and a third semiconductor switch connected in series. The third semiconductor switch is brought into conduction according to the second control signal.

Abstract: An electromagnetic resonance coupler includes a first transmission line on a top surface of a first dielectric layer, and a second transmission line on a top surface of a second dielectric layer. The first transmission line includes first and second resonance lines and first and second input-output lines. The second transmission line includes third and fourth resonance lines and third and fourth input-output lines. Third and fourth ground parts are provided separated from each other on the top surface of the second dielectric layer or the top surface of the first dielectric layer. The first resonance line and the third ground part are connected via a third connector, and the fourth resonance line and the fourth ground part are connected via a fourth connector.

Abstract: A gate driving circuit that controls a switching element includes: a startup switch which is provided between a gate voltage source and an output terminal; a termination switch which is provided between the output terminal and an output ground terminal; a startup resistor provided between a gate and a source of the startup switch; and a termination resistor provided between a gate and a source of the termination switch. At least one of the startup resistor or the termination resistor is configured to adjust a resistance value.

Abstract: A nitride semiconductor device includes: a substrate; a buffer layer formed on the substrate; a laminated body formed by two or more cycles of semiconductor layers each including a first nitride semiconductor layer, and a second nitride semiconductor layer having a larger band gap than a band gap of the first nitride semiconductor layer, the first and second nitride semiconductor layers being laminated in this order on the buffer layer; a first electrode; and a second electrode. A channel layer is formed in each of the semiconductor layers at an interface between the first nitride semiconductor layer and the second nitride semiconductor layer. A carrier concentration of the channel layer in the uppermost semiconductor layer is lower than a carrier concentration of each of the channel layers of the other semiconductor layers.

Abstract: A gate drive apparatus with an improved gate drive capability to control a switching device includes a signal transmitter, a signal receiver, and an electromagnetic resonance coupler. The signal transmitter includes a gate control signal generator, an oscillator circuit, and a mixer circuit. The signal receiver includes a positive voltage outputting rectifier circuit, a negative voltage outputting rectifier circuit, and a pull-down resistor. The positive voltage outputting rectifier circuit has a positive voltage outputting diode, a first inductor, and a first capacitor. The negative voltage outputting rectifier circuit has a negative voltage outputting diode, a second inductor, and a second capacitor. In the signal receiver, the diode of each rectifier circuit has an anode electrode made of a metal having a low work function. This configuration improves an output voltage amplitude of the gate drive apparatus.

Abstract: A semiconductor device includes a semiconductor layer made of nitride semiconductor, an ohmic electrode and a schottky electrode both formed on the semiconductor layer, a first insulating film containing a small amount of hydrogen per unit volume for covering the semiconductor device on a top face defined between the ohmic electrode and the schottky electrode and also covering the schottky electrode, and a second insulating film formed on the first insulating film and containing a greater amount of hydrogen per unit volume than the first insulating film.

Abstract: A semiconductor device includes a substrate; a carrier traveling layer formed on the substrate, made of first group III nitride semiconductor, and containing carriers traveling in a direction along a principal surface of the substrate; a barrier layer formed on the carrier traveling layer and made of second group III nitride semiconductor having a wider band gap than the first group III nitride semiconductor; and an electrode formed on the barrier layer. The device further includes a cap layer formed on the barrier layer at a side of the electrode, and made of third group III nitride semiconductor containing a mixture of single crystals and polycrystals.

Abstract: A semiconductor device includes a substrate; a carrier traveling layer formed on the substrate, made of first group III nitride semiconductor, and containing carriers traveling in a direction along a principal surface of the substrate; a barrier layer formed on the carrier traveling layer and made of second group III nitride semiconductor having a wider band gap than the first group III nitride semiconductor; and an electrode formed on the barrier layer. The device further includes a cap layer formed on the barrier layer at a side of the electrode, and made of third group III nitride semiconductor containing a mixture of single crystals and polycrystals.

Abstract: A nitride semiconductor device includes: a substrate; a buffer layer formed on the substrate; a laminated body formed by two or more cycles of semiconductor layers each including a first nitride semiconductor layer, and a second nitride semiconductor layer having a larger band gap than a band gap of the first nitride semiconductor layer, the first and second nitride semiconductor layers being laminated in this order on the buffer layer; a first electrode; and a second electrode. A channel layer is formed in each of the semiconductor layers at an interface between the first nitride semiconductor layer and the second nitride semiconductor layer. A carrier concentration of the channel layer in the uppermost semiconductor layer is lower than a carrier concentration of each of the channel layers of the other semiconductor layers.

Abstract: A semiconductor device includes a substrate; a carrier traveling layer formed on the substrate, made of first group III nitride semiconductor, and containing carriers traveling in a direction along a principal surface of the substrate; a barrier layer formed on the carrier traveling layer and made of second group III nitride semiconductor having a wider band gap than the first group III nitride semiconductor; and an electrode formed on the barrier layer. The device further includes a cap layer formed on the barrier layer at a side of the electrode, and made of third group III nitride semiconductor containing a mixture of single crystals and polycrystals.

Abstract: The spread spectrum radar apparatus in the present invention (i) includes: a transmission code generator (110); a reception code generator (121) generating a reception code obtained by delaying a transmission code; a spread modulator (112) spread-modulating a signal generated by a local oscillator (111) using the transmission code; a transmission antenna (113) transmitting the spread-modulated signal; a reception antenna (120) receiving a signal; a spread demodulator (122) demodulating the signal using the reception code to provide a correlation signal; a mixer (123) mixing the correlation signal and the signal generated by the local oscillator (111) to generate a radar signal; a virtual image determining unit (130) determining a virtual image; and a radar signal calculation device (160) calculating the radar signal using a virtual image determination signal, and (ii) adds a calculation and an offset signal for suppressing a peak intensity of the virtual image when the virtual image occurs.

Abstract: The code generation apparatus includes: a clock generator which generates a clock signal of a first frequency; a timing controller which generates a timing signal of a second frequency lower than the first frequency; a code table storage in which a plurality of code sequences serving as a source for a pseudo-noise code is stored; an address controller which selects, according to the timing signal, a code sequence to be read, from among a plurality of code sequences; a partial code sequence extractor which extracts, as a partial code sequence, a code of a predetermined length, from the code sequence to be read; and a parallel-series convertor which outputs the partial code sequence one bit at a time, according to the clock signal.

Abstract: The spread spectrum radar apparatus in the present invention (i) includes: a transmission code generator (110); a reception code generator (121) generating a reception code obtained by delaying a transmission code; a spread modulator (112) spread-modulating a signal generated by a local oscillator (111) using the transmission code; a transmission antenna (113) transmitting the spread-modulated signal; a reception antenna (120) receiving a signal; a spread demodulator (122) demodulating the signal using the reception code to provide a correlation signal; a mixer (123) mixing the correlation signal and the signal generated by the local oscillator (111) to generate a radar signal; a virtual image determining unit (130) determining a virtual image; and a radar signal calculation device (160) calculating the radar signal using a virtual image determination signal, and (ii) adds a calculation and an offset signal for suppressing a peak intensity of the virtual image when the virtual image occurs.

Abstract: The radar system includes: a transmission circuit transmitting the radar waves via a transmission antenna; a receiving circuit receiving the reflected waves via a receiving antenna; a delay line having an end connected to aid transmission circuit and the other end connected to said receiving circuit, which delays the radar waves by a predetermined delay amount; a correlation circuit/coherent detection circuit which detects a waveform having a strength equal to or higher than a predetermined strength, from a signal provided from said receiving circuit which obtains the signal from the reflected waves or the delayed radar waves; and a level decision circuit which judges, during self-diagnosis, whether or not the detected waveform is a waveform of the delayed radar wave according to the predetermined delay amount, and if the waveform is not the waveform of the delayed radar wave, determines that abnormality occurs in said radar system.

Abstract: The code generation apparatus includes: a clock generation unit (160) which generates a clock signal of a first frequency; a timing control unit (130) which generates a timing signal of a second frequency lower than the first frequency; a code table storage unit (120) in which a plurality of code sequences serving as a source for a pseudo-noise code is stored; an address control unit (110) which selects, according to the timing signal, a code sequence to be read, from among a plurality of code sequences; a partial code sequence extraction unit (140) which extracts, as a partial code sequence, a code of a predetermined length, from the code sequence to be read; and a parallel-series conversion unit (150) which outputs the partial code sequence by one bit at a time, according to the clock signal.

Abstract: To provide a spread spectrum radar apparatus which can lower the probability for misidentifying a presence of object.

Abstract: The radar system includes: a transmission circuit transmitting the radar waves via a transmission antenna; a receiving circuit receiving the reflected waves via a receiving antenna; a delay line having an end connected to aid transmission circuit and the other end connected to said receiving circuit, which delays the radar waves by a predetermined delay amount; a correlation circuit/coherent detection circuit which detects a waveform having a strength equal to or higher than a predetermined strength, from a signal provided from said receiving circuit which obtains the signal from the reflected waves or the delayed radar waves; and a level decision circuit which judges, during self-diagnosis, whether or not the detected waveform is a waveform of the delayed radar wave according to the predetermined delay amount, and if the waveform is not the waveform of the delayed radar wave, determines that abnormality occurs in said radar system.