Abstract: A radiation detection apparatus includes a flexible substrate, a radiation detector located on the flexible substrate, a drive located on a side portion of the flexible substrate and adjacent to the radiation detector to drive the radiation detector, and a relay including a plurality of wiring layers connected to the drive. The relay is for external connection and located on an extension of the flexible substrate. The extension extends outward from the side portion. The relay may include a basal portion adjacent to the side portion. The basal portion may have a width less than a width of the side portion.

Abstract: A photodetection device includes a substrate and a plurality of pixel units. The plurality of pixel units includes a pixel unit including a first photodetector in an active area, and a pixel unit including a second photodetector in an inactive area. The first photodetector includes a first lower electrode layer, a first lower extrinsic semiconductor layer, a first intrinsic semiconductor layer, a first upper extrinsic semiconductor layer, and a first upper electrode layer. The second photodetector includes a second lower electrode layer, a second lower extrinsic semiconductor layer, a second intrinsic semiconductor layer, a second upper extrinsic semiconductor layer, and a second upper electrode layer. The second lower electrode layer is covered with the second lower extrinsic semiconductor layer and the second intrinsic semiconductor layer.

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: In a data line drive/current measurement circuit, m measurement units are disposed in a plurality of semiconductor chips such that the m measurement units are distributed among the plurality of semiconductor chips. A display apparatus includes transistors such that one transistor is provided for two adjacent semiconductor chips. Inter-chip correction data indicating a variation among the semiconductor chips in terms of characteristics of elements in the measurement units is determined based on a result of a current measurement performed for the same transistor using measurement units disposed in different semiconductor chips. The inter-chip correction data is stored in a storage unit and is used in correcting an image signal. The inter-chip correction data may be determined based on a result of measuring a current flowing through a common cathode of organic EL elements for each semiconductor chip.

Abstract: A display device that is configured to include two independent shift registers and is capable of performing a monitoring process without causing the degradation of display quality or the occurrence of abnormal operation is implemented. In a display device including: a writing control shift register composed of a plurality of first unit circuits (30) each including a first boost circuit (320) and a first output node reset circuit (330); and a monitoring control shift register composed of a plurality of second unit circuits (40) each including a second boost circuit (420) and a second output node reset circuit (430), current drive capability of the first boost circuit (320) is higher than current drive capability of the second boost circuit (420), and current drive capability of the second output node reset circuit (430) is higher than current drive capability of the first output node reset circuit (330).

Abstract: The organic EL display device includes: a current monitoring section that measures a current flowing in a circuit element and outputs a digital measured value in accordance with the measured current; and an averaging section (36) that calculates an average value of a plurality of input values. The current monitoring section measures the current flowing in a circuit element in each pixel circuit a plurality of times in a fixed amount of time. For each pixel circuit, the averaging section (36) receives a plurality of measured values outputted from the current monitoring section in a fixed amount of time as a plurality of input values and outputs an average value of the plurality of digital measured values as a value for use in compensation computation to compensate for degradation of the circuit element.

Abstract: When a display mode is a high-resolution mode, image display is performed by time division driving. When the display mode is a low-resolution mode, image display is performed by defining j pixel circuits arranged continuously in a direction in which scanning signal lines extend as one group, bringing only one organic EL element into a light-emitting state in each of the pixel circuits in a frame period, and bringing organic EL elements having respective light emission colors different from one another into a light-emitting state in the j pixel circuits included in each group in the frame period. Pixel circuits in a display unit are configured such that the intervals of organic EL elements which go into a light-emitting state in the frame period when in the low-resolution mode are equalized regarding a direction in which the scanning signal lines extend.

Abstract: The purpose of the present invention is to suppress the fluctuation of a data line voltage that occurs when an analog voltage signal is sampled and held in a data line in a display device provided with a current-driven display element. Transistors (SWr, SWG, SWb) of each demultiplexer (252) are successively switched on, for each predetermined period, in a selection period of a write control line (SW_LR(i)). In a period when the transistor (SWr) is switched on, an analog video signal (Dj) from a data voltage output unit circuit (211d) is applied to a data line (SLrj) and a pixel circuit (50r). When the transistor SWr is then switched off, the voltage held by the data line (SLrj) decreases below the voltage of the analog video signal (Dj) due to a parasitic capacitance (Cssdr). However, the voltage of a voltage fluctuation compensation line (G3_Cnt (i)) changes from a low level to a high level within the selection period.

Abstract: In each of pixel circuits in an organic EL display device configured to display color images in a field sequential method, a drive transistor is connected to first to third organic EL elements configured to emit red light, green light, and blue light through first to third light emission control transistors. A connection point between the drive transistor and the light emission control transistors is connected to a data line through a monitor control transistors. A data-side driving circuit is provided with a data voltage output unit circuit and a current measurement unit circuit for each of data lines. The data-side driving circuit is configured to be able to switch between the unit circuits to connect either one of the unit circuits to the data line.

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: In a data line drive/current measurement circuit, m measurement units are disposed in a plurality of semiconductor chips such that the m measurement units are distributed among the plurality of semiconductor chips. A display apparatus includes transistors such that one transistor is provided for two adjacent semiconductor chips. Inter-chip correction data indicating a variation among the semiconductor chips in terms of characteristics of elements in the measurement units is determined based on a result of a current measurement performed for the same transistor using measurement units disposed in different semiconductor chips. The inter-chip correction data is stored in a storage unit and is used in correcting an image signal. The inter-chip correction data may be determined based on a result of measuring a current flowing through a common cathode of organic EL elements for each semiconductor chip.

Abstract: The purpose of the present invention is to suppress the fluctuation of a data line voltage that occurs when an analog voltage signal is sampled and held in a data line in a display device provided with a current-driven display element. Transistors (SWr, SWG, SWb) of each demultiplexer (252) are successively switched on, for each predetermined period, in a selection period of a write control line (SW_LR(i)). In a period when the transistor (SWr) is switched on, an analog video signal (Dj) from a data voltage output unit circuit (211d) is applied to a data line (SLrj) and a pixel circuit (50r). When the transistor SWr is then switched off, the voltage held by the data line (SLrj) decreases below the voltage of the analog video signal (Dj) due to a parasitic capacitance (Cssdr). However, the voltage of a voltage fluctuation compensation line (G3_Cnt (i)) changes from a low level to a high level within the selection period.

Abstract: A picture-frame size of a display device including self light-emitting type display elements which are driven by a current is reduced over conventional devices. Transistors for controlling supply of a light-emission enable signal outputted from an emission driver to emission lines are provided between the emission driver and the emission lines. In such a configuration, based on selection signals provided to the transistors, one of the transistors is brought into an on state in each subframe, and each of the transistors is brought into an on state once during one frame period.

Abstract: A data line drive circuit provides a voltage according to a detection voltage and to a reference voltage, between the gate and source of a drive transistor in a pixel circuit, and detects a drive current having passed through the drive transistor and outputted external to the pixel circuit. A threshold voltage correction memory stores, for each pixel circuit, data representing a threshold voltage of the drive transistor. A display control circuit controls the reference voltage based on the data stored in the threshold voltage correction memory. By this, even if the threshold voltage of the drive transistor is changed, the drive current can be detected with a high accuracy. The threshold voltage correction memory may store, for each pixel circuit, data representing a difference between the threshold voltage of the drive transistor and the reference voltage.

Abstract: A display device that is configured to include two independent shift registers and is capable of performing a monitoring process without causing the degradation of display quality or the occurrence of abnormal operation is implemented. In a display device including: a writing control shift register composed of a plurality of first unit circuits (30) each including a first boost circuit (320) and a first output node reset circuit (330); and a monitoring control shift register composed of a plurality of second unit circuits (40) each including a second boost circuit (420) and a second output node reset circuit (430), current drive capability of the first boost circuit (320) is higher than current drive capability of the second boost circuit (420), and current drive capability of the second output node reset circuit (430) is higher than current drive capability of the first output node reset circuit (330).

Abstract: A drive circuit classifies frame periods as a drive period and a pause period, and applies a selection voltage to scanning lines in turn and applies voltages according to a video signal (a measurement voltage in the case of measurement targets) to data lines in turn during the drive period. During the pause period, the drive circuit applies the selection voltage to one scanning line corresponding to measurement target pixel circuits, and a measurement circuit measures drive currents outputted to the data lines from the measurement target pixel circuits. The drive circuit may set a write period and a measurement period in the pause period. During the write period, the drive circuit may apply the measurement voltage to the data lines. During the measurement period, the measurement circuit may measure drive currents outputted to the data lines from the measurement target pixel circuits.

Abstract: The organic EL display device includes: a current monitoring section that measures a current flowing in a circuit element and outputs a digital measured value in accordance with the measured current; and an averaging section (36) that calculates an average value of a plurality of input values. The current monitoring section measures the current flowing in a circuit element in each pixel circuit a plurality of times in a fixed amount of time. For each pixel circuit, the averaging section (36) receives a plurality of measured values outputted from the current monitoring section in a fixed amount of time as a plurality of input values and outputs an average value of the plurality of digital measured values as a value for use in compensation computation to compensate for degradation of the circuit element.

Abstract: In a pixel circuit, TFTs are connected and driven such that a threshold voltage Vth of a TFT, which is a drive transistor, can be held in a threshold holding capacitor having a capacitance value c1, voltages, including a data potential Vdata representing an image to be displayed, can be held in a data holding capacitor having a capacitance value c2, and charges in the data holding capacitor and the threshold holding capacitor are redistributed at the time of light emission. As a result, a potential obtained by multiplying the data potential Vdata by c1/(c1+c2) is provided to a gate potential of the TFT.

Abstract: When a clock signal pulse number and a compensation-target-line address indicating a compensation-target row match, the following control is carried out with a time point being a starting point of a current measurement period, the time point being one horizontal scanning period after a time point of the match. At a current measurement period starting point and ending point, only the potential of the one of the clock signals applied to a unit circuit corresponding to the compensation-target row is changed. Throughout the current measurement period, the clock operation of the clock signals is stopped. A monitor enable signal, that is applied to a control terminal of an output control transistor for controlling active signal output to a monitor control line, is only set to a high level during the current measurement period.