Patents by Inventor Noboru Okubo
Noboru Okubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220181192Abstract: At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.Type: ApplicationFiled: February 28, 2022Publication date: June 9, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi NOMA, Noboru OKUBO, Yusheng LIN
-
Patent number: 11264264Abstract: At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.Type: GrantFiled: October 23, 2019Date of Patent: March 1, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi Noma, Noboru Okubo, Yusheng Lin
-
Publication number: 20210028051Abstract: At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.Type: ApplicationFiled: October 23, 2019Publication date: January 28, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Takashi NOMA, Noboru OKUBO, Yusheng LIN
-
Patent number: 8766408Abstract: A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.Type: GrantFiled: March 7, 2007Date of Patent: July 1, 2014Assignee: Semiconductor Components Industries, LLCInventors: Takashi Noma, Shigeki Otsuka, Yuichi Morita, Kazuo Okada, Hiroshi Yamada, Katsuhiko Kitagawa, Noboru Okubo, Shinzo Ishibe, Hiroyuki Shinogi
-
Patent number: 8102039Abstract: This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device component 1 and a pad electrode 4 electrically connected with the device component 1 are formed on a semiconductor substrate 2. A supporting member 7 is bonded to a surface of the semiconductor substrate 2 through an adhesive layer 6. There is formed a through-hole 15 in the supporting member 7 penetrating from its top surface to a back surface. Electrical connection with another device is made possible through the through-hole 15. A depressed portion 12 is formed in a partial region of the top surface of the supporting member 7. Therefore, all or a portion of another device or a component can be disposed utilizing a space in the depressed portion 12.Type: GrantFiled: August 2, 2007Date of Patent: January 24, 2012Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLCInventors: Takashi Noma, Yuichi Morita, Hiroshi Yamada, Kazuo Okada, Katsuhiko Kitagawa, Noboru Okubo, Shinzo Ishibe, Hiroyuki Shinogi
-
Patent number: 7986021Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.Type: GrantFiled: December 15, 2006Date of Patent: July 26, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Kazuo Okada, Katsuhiko Kitagawa, Takashi Noma, Shigeki Otsuka, Hiroshi Yamada, Shinzo Ishibe, Yuichi Morita, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
-
Patent number: 7969007Abstract: A semiconductor device with improved moisture resistance and its manufacturing method as well as a manufacturing method of a semiconductor device which simplifies a manufacturing process and improves productivity are offered. This invention offers a CSP type semiconductor device and its manufacturing method that can prevent moisture and the like from infiltrating into it to attain high reliability by covering a side surface of a semiconductor chip with a thick protection layer. This invention also offers a highly productive manufacturing method of semiconductor devices by which a supporter bonded to semiconductor dice is etched from a back surface-side of the supporter so that the semiconductor devices can be separated without dicing.Type: GrantFiled: April 29, 2008Date of Patent: June 28, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Takashi Noma, Hiroyuki Shinogi, Noboru Okubo
-
Publication number: 20100164086Abstract: This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device component 1 and a pad electrode 4 electrically connected with the device component 1 are formed on a semiconductor substrate 2. A supporting member 7 is bonded to a surface of the semiconductor substrate 2 through an adhesive layer 6. There is formed a through-hole 15 in the supporting member 7 penetrating from its top surface to a back surface. Electrical connection with another device is made possible through the through-hole 15. A depressed portion 12 is formed in a partial region of the top surface of the supporting member 7. Therefore, all or a portion of another device or a component can be disposed utilizing a space in the depressed portion 12.Type: ApplicationFiled: August 2, 2007Publication date: July 1, 2010Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Takashi Noma, Yuichi Morita, Hiroshi Yamada, Kazuo Okada, Katsuhiko Kitagawa, Noboru Okubo, Shinzo Ishibe, Hiroyuki Shinogi
-
Patent number: 7633133Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.Type: GrantFiled: December 15, 2006Date of Patent: December 15, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Takashi Noma, Kazuo Okada, Shinzo Ishibe, Katsuhiko Kitagawa, Yuichi Morita, Shigeki Otsuka, Hiroshi Yamada, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
-
Patent number: 7589388Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.Type: GrantFiled: October 19, 2007Date of Patent: September 15, 2009Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Yuichi Morita, Takashi Noma, Hiroyuki Shinogi, Shinzo Ishibe, Katsuhiko Kitagawa, Noboru Okubo, Kazuo Okada, Hiroshi Yamada
-
Publication number: 20080277793Abstract: A semiconductor device with improved moisture resistance and its manufacturing method as well as a manufacturing method of a semiconductor device which simplifies a manufacturing process and improves productivity are offered. This invention offers a CSP type semiconductor device and its manufacturing method that can prevent moisture and the like from infiltrating into it to attain high reliability by covering a side surface of a semiconductor chip with a thick protection layer. This invention also offers a highly productive manufacturing method of semiconductor devices by which a supporter bonded to semiconductor dice is etched from a back surface-side of the supporter so that the semiconductor devices can be separated without dicing.Type: ApplicationFiled: April 29, 2008Publication date: November 13, 2008Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.Inventors: Takashi Noma, Hiroyuki Shinogi, Noboru Okubo
-
Publication number: 20080128914Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.Type: ApplicationFiled: October 19, 2007Publication date: June 5, 2008Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Yuichi MORITA, Takashi NOMA, Hiroyuki SHINOGI, Shinzo ISHIBE, Katsuhiko KITAGAWA, Noboru OKUBO, Kazuo OKADA, Hiroshi YAMADA
-
Publication number: 20070210437Abstract: A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.Type: ApplicationFiled: March 7, 2007Publication date: September 13, 2007Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Takashi Noma, Shigeki Otsuka, Yuichi Morita, Kazuo Okada, Hiroshi Yamada, Katsuhiko Kitagawa, Noboru Okubo, Shinzo Ishibe, Hiroyuki Shinogi
-
Publication number: 20070145590Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Takashi Noma, Kazuo Okada, Shinzo Ishibe, Katsuhiko Kitagawa, Yuichi Morita, Shigeki Otsuka, Hiroshi Yamada, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
-
Publication number: 20070145420Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazuo Okada, Katsuhiko Kitagawa, Takashi Noma, Shigeki Otsuka, Hiroshi Yamada, Shinzo Ishibe, Yuichi Morita, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
-
Publication number: 20030144921Abstract: A method of selling or purchasing merchandise over a network for allowing an individual to purchase particular merchandise promptly, and to make a donation to an arbitrary organization by purchasing particular merchandise is provided.Type: ApplicationFiled: January 17, 2003Publication date: July 31, 2003Inventors: Noboru Okubo, Hiroshi Okubo
-
Patent number: 4447805Abstract: In an array of coke ovens each including a plurality of combustion chambers having a plurality of flue nozzles, a measuring car equipped with a temperature measuring member runs above the array in a direction of the array or in a longitudinal direction of the combustion chambers so as to detect thermal radiations passing through the flue nozzles to measure combustion chamber temperature. The measured temperature is sent to a remote control room through antennae. Where a coal charging car of a Rahmen construction is used an antenna is also provided for the coal charging car so that even when the measuring car runs beneath the coal charging car, radio communication can be assured. The temperature of the combustion chambers can be readily and accurately measured by linearly running the measuring car whether combustion is effected in one or the other side of the combustion chambers.Type: GrantFiled: February 18, 1982Date of Patent: May 8, 1984Assignee: Mitsubishi Kasei Kogyo Kabushiki KaishaInventors: Yoshihiro Omae, Noboru Okubo, Keiichi Sigyo, Hideo Nakajima, Hiroaki Fukui, Toshio Yamada, Hideyuki Honda