Abstract: A picture processing apparatus for picture-in-picture applications where the number of pixels n in the horizontal direction of an original picture, the number of pixels m in the vertical direction thereof, the number of pixels N in the horizontal direction of the converted picture, and the number of pixels M in the vertical direction thereof are supplied to a dividing device. Thus, ratios A=N/n and B=M/m are obtained. The inverse number 1/A of the value A is cumulated by circuits. An address generating circuit generates addresses at four points for calculating a density value a of a converted pixel corresponding to the integer part of a cumulated value &Sgr;(1/A). These addresses are supplied to memories. The pixel data at the four points that are read from the memories are supplied to respective multiplying devices. The decimal part of the value &Sgr;(1/A) is supplied as an interpolating coefficient p to a multiplying device. A coefficient (1−q) is supplied to a multiplying device.