Patents by Inventor Nobuaki Kakimori

Nobuaki Kakimori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5450204
    Abstract: An inspecting device inspects the printed state of cream solder by projecting a plurality of light patterns varying in phase onto a printed circuit board printed with cream solder, and processing signals obtained by an image pick-up device for picking up the image on the surface of the printed circuit board using a phase shifting method. A printed position, area, thickness or amount of the cream solder can be detected. By comparing the data thus obtained with reference data, the printed state is evaluated. The printed state of the cream solder may be examined quickly and positively, while a continuous automatic processing can be effected without stopping the mounting process of the printed circuit board in a production line.
    Type: Grant
    Filed: March 26, 1993
    Date of Patent: September 12, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihide Shigeyama, Nobuaki Kakimori, Yuichi Yamamoto, Yutaka Iwata, Kengo Nishigaki, Shin Kishimoto
  • Patent number: 4978224
    Abstract: To determine whether chip components are properly mounted on a printed circuit board, two sets of slit light beams for projecting slit line images in mutually perpendicular directions are alternately made incident thereon diagonally from above. Edges of the mounted chip components produce discontinuities in the projected slit beam image patterns such that the positions, sizes, orientations, etc. of individual mounted components can be calculated from image data obtained from viewing positions above the circuit board by a camera or the like. Since it can be easily ascertained how the slit line image pattern should appear if proper components are properly mounted, an analysis of the calculated data can indicate whether the chip components are properly mounted on the tested printed circuit board.
    Type: Grant
    Filed: July 12, 1988
    Date of Patent: December 18, 1990
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shin Kishimoto, Toshihide Morimoto, Nobuaki Kakimori, Yuho Takahashi, Morihide Ohsaki