Abstract: A communication system includes multiple communication nodes and a communication line. The multiple communication nodes include a master and multiple slaves. The communication line cascade-connects the communication nodes and supplies electricity. The communication line corresponds to a feeder line. Each of the communication nodes is connected with the communication line through an inductor to be supplied with electricity. The each of the communication nodes is AC coupled to the communication line to transmit and receive a communication signal. The master and the slaves perform a bidirectional communication. A communication slave is provided. The communication slave is connected with a communication line through an inductor to be supplied with electricity. A communication master is provided.

Abstract: A communication system includes a communication wiring, at least one master node connected to the communication wiring, and at least one slave node connected to the communication wiring. The at least one master node and the at least one slave node are connected in a ring shape through the communication wiring and communicate in a start-stop synchronous communication.

Abstract: A communication system including multiple communication nodes is provided. Each of the multiple communication nodes includes a low speed communication transceiver that is directly connected to a differential communication channel, and a high speed communication transceiver that is AC coupled to the differential channel. The multiple communication nodes include a sending communication node. The sending communication node sends a command to switch from the low speed communication to a high speed communication when the sending communication node performs a low speed communication using the low speed communication transceiver. The sending communication node initiates the high speed communication using the high speed communication transceiver.

Abstract: A data reception apparatus obtains an integrated number of bits by integrating the numbers of bits of a bit string, obtains an integrated number of samples by integrating the number of samples obtained by oversampling each bit, obtains an approximated line that indicates correspondence between the integrated number of bits and the integrated number of samples, determines, based on the approximated line, a bit length of a bit string corresponding to a segment in which identical values continue in oversampling data after the integrated number of samples. Even when a receive-side clock source has a degree of clock frequency error against a transmit-side clock source, how many samples one bit of the bit string corresponds to is obtained with an accuracy higher than a period of oversampling (inverse of the number of samples).

Abstract: Nodes are connected in parallel between two transmission lines and configured to utilize a telecommunications standard of a differential transmission. At least one of the nodes includes two input/output terminals, a driver, a receiver, a resistor, and a comparator. The two input/output terminals are connected to the two transmission lines. The driver includes two output terminals connected to the two input/output terminals. The receiver includes two input terminals connected to the two input/output terminals. The resistor is connected between each of the two input/output terminals and one of a grand and a power supply voltage. The comparator compares a voltage between the transmission lines with a reference voltage to determine whether the transmission lines are in an idle state or in a communication state.