Patents by Inventor Nobuaki Miura

Nobuaki Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6745533
    Abstract: The present invention is provided for considerably shortening the construction time of a building that is applied to nuclear power plants. When constructing the building, megablocks having a height that extends to a plurality of floors are produced, and together with combining those megablocks, concrete is poured inside them to form a wall member composed of a megawall structure of steel plate reinforced concrete construction. Alternatively, in addition to the wall megablocks, floor megablocks for forming the floor member of the building are used, and together with combining those megablocks, concrete is poured inside or above them to form a structural member (wall member and floor member) composed of a megawall structure of steel plate reinforced concrete construction.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: June 8, 2004
    Assignees: Tokyo Electric Power Company, Inc., Shimizu Construction Co., Ltd.
    Inventors: Toshio Yamashita, Yoshimasa Tsuchiya, Kazuyuki Nakamura, Kiyoshi Nakamura, Kenji Sekiguchi, Hiroshi Murakami, Nobuaki Miura, Isao Kojima, Sadao Suzuki, Yasuyoshi Shimazaki, Yoichiro Takeuchi, Fumio Fujita
  • Publication number: 20030024202
    Abstract: The present invention is provided for considerably shortening the construction time of a building that is applied to nuclear power plants. When constructing the building, megablocks having a height that extends to a plurality of floors are produced, and together with combining those megablocks, concrete is poured inside them to form a wall member composed of a megawall structure of steel plate reinforced concrete construction. Alternatively, in addition to the wall megablocks, floor megablocks for forming the floor member of the building are used, and together with combining those megablocks, concrete is poured inside or above them to form a structural member (wall member and floor member) composed of a megawall structure of steel plate reinforced concrete construction.
    Type: Application
    Filed: July 24, 2002
    Publication date: February 6, 2003
    Applicant: Tokyo Electric Power Company, Inc.
    Inventors: Toshio Yamashita, Yoshimasa Tsuchiya, Kazuyuki Nakamura, Kiyoshi Nakamura, Kenji Sekiguchi, Hiroshi Murakami, Nobuaki Miura, Isao Kojima, Sadao Suzuki, Yasuyoshi Shimazaki, Yoichiro Takeuchi, Fumio Fujita
  • Patent number: 5150142
    Abstract: In a fixer replenishing device employed in an automatic processor, a hardening agent is diluted with water and then mixed with a fixing agent. Since the hardening agent is not directly mixed with the fixing agent, no crystals are deposited.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: September 22, 1992
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Yoshihiro Masuda, Akira Murata, Hitoshi Togawa, Nobuaki Miura
  • Patent number: 4016589
    Abstract: A semiconductor composite having a rectifying characteristic is provided by first forming an insulating film of a semiconductor compound such as SiO.sub.2 on a semiconductor substrate of N-type Si to a uniform thickness of 27A to 500A, for example, and then further depositing thereon a tin oxide film. The intermediate insulating film between the SnO.sub.2 film and the semiconductor substrate decreases the reverse leakage current, raises the reverse breakdown voltage and makes uniform the reverse breakdown voltage. The semiconductor composite of the present invention, as subjected to a predetermined value of light energy, shows an excellent switching characteristic with respect to a voltage applied to the composite in a reverse direction. Also the semiconductor composite of the present invention, as supplied with a certain value of reverse bias voltage or with no bias, shows an excellent switching characteristic with respect to light energy applied to the composite.
    Type: Grant
    Filed: March 26, 1974
    Date of Patent: April 5, 1977
    Assignee: Omron Tateisi Electronics Co., Ltd.
    Inventors: Shigeru Tanimura, Nobuaki Miura, Osamu Asano
  • Patent number: 4005468
    Abstract: A semiconductor photoelectric device of improved photoelectric and rectifying characteristics is provided by first forming a film of electrically insulating material such as silicon dioxide of a substantial thickness on a main surface of a semiconductor substrate so as to have a plurality of portions of said main surface exposed through a corresponding plurality of square or rectangle openings laid out at right angles, said openings being defined by said insulating material film, depositing a tin oxide film on the open areas of the semiconductor substrate, removing a portion of said tin oxide film just overlying the said insulating film for separating the respective barrier regions formed between the tin oxide film and the substrate, and providing a metal layer on said insulating film for connecting the end portion of the tin oxide film of the adjacent barrier regions.
    Type: Grant
    Filed: April 3, 1973
    Date of Patent: January 25, 1977
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Shigeru Tanimura, Nobuaki Miura, Mikizo Miyamoto
  • Patent number: 3952323
    Abstract: A semiconductor photoelectric device of improved photoelectric and rectifying characteristics is provided by first forming a film or silicon dioxide on a main surface, having a crystallographic orientation of (100), of a semiconductor substrate of N-type silicon, the film being formed to a thickness less than 25A., for example, and then further depositing thereon a tin oxide film. It was found that adoption of the abovementioned (100) orientation reduces the reverse saturation current and thus the dark current of the device, with the result that the open voltage of the device is accordingly increased. It was also found that proper choice of specific resistivity of the substrate improves linearity of the photoelectric characteristic.
    Type: Grant
    Filed: August 14, 1973
    Date of Patent: April 20, 1976
    Assignee: Omron Tateisi Electronics Co., Ltd.
    Inventors: Shigeru Tanimura, Nobuaki Miura, Mikizo Miyamoto