Abstract: A clock reproduction circuit for reproducing a data clock from a data signal is disclosed. The clock reproduction circuit includes a voltage controlled oscillator, a phase detector, a frequency error detection circuit and a charge pump whose output is controlled by the outputs of the phase detector and the frequency error detection circuit. A VCO clock output from the voltage controlled oscillator is synchronized with the data clock by the feedback loop consisting of these elements. The frequency error detection circuit detects a frequency error between the VCO clock and the data clock by detecting changes in the phases of the VCO clock at the transition edges of the data signal. Analog and digital frequency error detection circuits are disclosed. Further, improved circuit elements in the clock reproduction circuit are disclosed.

Abstract: An apparatus for growing a material at high temperature and employing a reaction gas. A reaction vessel is formed of a metal sidewall having outer and inner surfaces, the inner surface surrounding and defining a reaction chamber within the reaction vessel and which is generally vertically oriented. A cooling system maintains the metal sidewall of the reaction vessel at a temperature at which the metal does not produce contamination within the reaction chamber as a result of the high temperature operation, the reactant gases introduced into the reaction chamber or the product gases resultant from the reaction. A support mechanism includes a generally vertically oriented rod member which supports a susceptor, adapted to hold a wafer on which the material is to be grown, within the bottom part of the reaction chamber and, further, seals the reaction chamber.

Abstract: A clock signal regenerating circuit includes a first PLL circuit, a PLL part circuit which forms a second PLL circuit in cooperation with the first PLL circuit, the second PLL circuit performing a frequency-synchronizing operation on a clock signal and a data signal. The first PLL circuit performs a phase-synchronizing operation on the clock signal and an output signal of the PLL part circuit. The phase-synchronizing operation has a speed lower than that of the frequency-synchronizing operation.

Abstract: A clock reproduction circuit produces a data clock from a data signal. The clock reproduction circuit includes a voltage controlled oscillator, a phase detector, a frequency error detection circuit and a charge pump whose output is controlled by the outputs of the phase detector and the frequency error detection circuit. A VCO clock output from the voltage controlled oscillator is synchronized with the data clock by the feedback loop consisting of these elements. The frequency error detection circuit detects a frequency error between the VCO clock and the data clock by detecting changes in the phases of the VCO clock at the transition edges of the data signal. Analog and digital frequency error detection circuits are used. Further, improved circuit elements in the clock reproduction circuit used.

Abstract: A MOCVD apparatus comprises a base, an outer vessel extending upward from the base to form a closed space between the base and the outer vessel, an inner vessel provided in the space such that the inner vessel extends upward from the base in correspondence to the outer vessel to form a closed second space and forming a reaction chamber between the outer vessel and the inner vessel, a gas inlet formed at an upper end of the outer vessel for introducing a source gas into the reaction chamber, a gas outlet formed at the base in correspondence to the reaction chamber for evacuating the reaction chamber, the outer vessel and inner vessel being configured to induce a directional flow of gas in the reaction chamber from the gas inlet to the base, a susceptor provided on the inner vessel to extend generally parallel to the directional flow of the gas for supporting a substrate thereon, a plurality of ring-shaped lamps provided in the second space with a substantially concentric relationship with each other such that