Patents by Inventor Nobuaki Yoneya

Nobuaki Yoneya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8635472
    Abstract: A semiconductor integrated circuit device which enables a power-supply voltage terminal and an internal circuit to be isolated from each other in a noncontact operation of a semiconductor integrated circuit device for an IC card, including a first power supply circuit for rectifying and smoothing an AC signal supplied from an antenna, a second power supply circuit which includes a voltage control circuit for controlling a gate terminal voltage of a first MOS transistor, a substrate potential control circuit for forming a source voltage of the first MOS transistor as a substrate voltage, and a second MOS transistor which causes the substrate voltage and the gate voltage of the first MOS transistor to be conductive when using the first power supply circuit, and which causes the substrate voltage and the gate voltage to be nonconductive when using power supplied from an external terminal.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: January 21, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuki Watanabe, Nobuaki Yoneya
  • Publication number: 20130067252
    Abstract: A semiconductor intergrated circuit device which enables a power-supply voltage terminal and an internal circuit to be isolated from each other in a noncontact operation of a semiconductor integrated circuit device for an IC card, including a first power supply circuit for rectifying and smoothing an AC signal supplied from an antenna, a second power supply circuit which includes a voltage control circuit for controlling a gate terminal voltage of a first MOS transistor, a substrate potential control circuit for forming a source voltage of the first MOS transistor as a substrate voltage, and a second MOS transistor which causes the substrate voltage and the gate voltage of the first MOS transistor to be conductive when using the first power supply circuit, and which causes the substrate voltage and the gate voltage to be nonconductive when using power supplied from an external terminal.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 14, 2013
    Inventors: Kazuki WATANABE, Nobuaki Yoneya
  • Patent number: 8301915
    Abstract: The present invention enables a power-supply voltage terminal and an internal circuit to be isolated from each other in a noncontact operation without largely increasing a chip area in a semiconductor integrated circuit device for an IC card.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: October 30, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuki Watanabe, Nobuaki Yoneya
  • Patent number: 5053650
    Abstract: A monolithic semiconductor integrated circuit device includes a differentially operative circuit section, an amplifying element connected to define a current flowing in the differentially operative circuit section and a circuit for adjusting a current flowing in the amplifying element to thereby compensate for variations of electric characteristics from one semiconductor device to another. The current adjusting circuit includes at least one amplifying element and a load resistance for the amplifying element in the current adjusting circuit. The load resistance has a structure suitable for a trimming operation to adjustably determine the resistance value of the load resistance.
    Type: Grant
    Filed: December 26, 1989
    Date of Patent: October 1, 1991
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Yuichi Ohkubo, Satoru Sekiguchi, Toshihiko Watanabe, Nobuaki Yoneya