Abstract: A method of evaluating metal contamination by measuring the amount of metal contaminants to a silicon wafer in a rapid thermal processing apparatus includes steps of obtaining a Si single crystal grown by the Czochralski method at a pulling rate of 1.0 mm/min or lower, the crystal having oxygen concentration of 1.3×1018 atoms/cm3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.

Abstract: An evaluation method of a silicon wafer allows non-destructive and non-contact inspection of a slip that affects the electrical properties of semiconductor devices, without being subjected to restrictions of the surface condition of silicon wafers or processing contents as much as possible. The evaluation method of a silicon wafer includes a step of section analysis where a surface of a single crystal silicon wafer after thermal processing is divided by equally-spaced lines into sections with an area of 1 mm2 or more and 25 mm2 or less and the existence of strain in each of the sections is determined based on a depolarization value of polarized infrared light, and a screening step where the wafer is evaluated as non-defective when the number of adjacent sections being determined to have strain by the section analysis step does not exceed a predetermined threshold value.

Abstract: A method of evaluating metal contamination by measuring the amount of metal contaminants to a silicon wafer in a rapid thermal processing apparatus includes steps of obtaining a Si single crystal grown by the Czochralski method at a pulling rate of 1.0 mm/min or lower, the crystal having oxygen concentration of 1.3×1018 atoms/cm3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.

Abstract: An evaluation method of a silicon wafer allows non-destructive and non-contact inspection of a slip that affects the electrical properties of semiconductor devices, without being subjected to restrictions of the surface condition of silicon wafers or processing contents as much as possible. The evaluation method of a silicon wafer includes a step of section analysis where a surface of a single crystal silicon wafer after thermal processing is divided by equally-spaced lines into sections with an area of 1 mm2 or more and 25 mm2 or less and the existence of strain in each of the sections is determined based on a depolarization value of polarized infrared light, and a screening step where the wafer is evaluated as non-defective when the number of adjacent sections being determined to have strain by the section analysis step does not exceed a predetermined threshold value.

Abstract: A method of manufacturing a semiconductor device and a semiconductor substrate including: a step of subjecting the semiconductor substrate to a wet process by relatively moving a process liquid and the semiconductor substrate during the wet process in an environment where there is not a static electricity removing effect with respect to the semiconductor substrate, the semiconductor substrate having a single crystal, polycrystalline, or amorphous silicon on at least a part of its surface; and a step of holding the semiconductor substrate with a jig electrified to the same extent as that of the semiconductor substrate after the wet process or a non-conductive jig. And a semiconductor substrate which is electrified to +100 V to +12 kV.