Patents by Inventor Nobuhiko Ando

Nobuhiko Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220393648
    Abstract: An amplitude and phase control device includes a signal dividing unit to divide a transmission signal into first and second signals and output the first and second signals to a Doherty amplifier, an error calculating unit to acquire, from the Doherty amplifier, a synthesized signal of first and second signals amplified by the Doherty amplifier, multiply the synthesized signal by a reciprocal of a gain of the Doherty amplifier, and calculate an error between a synthesized signal after being multiplied by the reciprocal and the transmission signal, and a controlling unit to control an amplitude of each of the first signal and the second signal output from the signal dividing unit depending on the error calculated by the error calculating unit, and control a phase difference between the first signal output from the signal dividing unit and the second signal output from the signal dividing unit depending on the error.
    Type: Application
    Filed: August 11, 2022
    Publication date: December 8, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ao YAMASHITA, Hiroto SAKAKI, Nobuhiko ANDO, Hideyuki NAKAMIZO
  • Patent number: 10585169
    Abstract: A signal generating circuit includes a control voltage setting unit (CVSU) configured to set a control voltage for a chirp signal using voltage-frequency characteristics indicating characteristics of an output frequency versus voltage; a VCO configured to alter the frequency of its output signal by the control voltage; a quadrature demodulator configured to perform quadrature demodulation of the output signal of the VCO to generate an inphase signal and a quadrature signal orthogonal to each other; and a frequency detector configured to detect the frequency of the output signal of the VCO on the basis of the inphase signal and quadrature signal. The CVSU corrects the control voltage by using the voltage-frequency characteristics derived from relationships between the control voltage and the frequency of the output signal of the VCO. The VCO generates the chirp signal based on the control voltage corrected by the CVSU.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: March 10, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhide Higuchi, Nobuhiko Ando, Koji Tsutsumi, Hiroyuki Mizutani, Morishige Hieda
  • Publication number: 20200076453
    Abstract: A signal source (44) supplies local signals having different phases to a first mixer (42) and a second mixer (43). The first mixer (42) and the second mixer (43) perform frequency conversion on reception signals using the local signals. A first phase changing unit (51) and a second phase changing unit (52) receive output signals of the first mixer (42) and the second mixer (43) as input signals and generate in-phase and reversed phase signals of these signals. A first adder (53) adds output signals of the first phase changing unit (51) to separate multiple signals. A second adder (54) adds output signals of the second phase changing unit (52) to separate multiple signals.
    Type: Application
    Filed: June 30, 2017
    Publication date: March 5, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroto SAKAKI, Nobuhiko ANDO, Hiroshi OTSUKA, Kenichi TAJIMA
  • Patent number: 10543869
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: January 28, 2020
    Assignee: NSK LTD.
    Inventors: Shin Kumagai, Kyosho Uryu, Nobuhiko Ando
  • Patent number: 10516209
    Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 24, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hifumi Noto, Nobuhiko Ando, Hideyuki Nakamizo, Morishige Hieda, Hideki Morishige
  • Patent number: 10471984
    Abstract: An electronic control unit where an external watch dog timer (WDT) can always normally detect an abnormality (a failure) to a micro controller unit (MCU) related to a built-in self-test (BIST) function and which can maintain safety of a system. The control unit includes an external WDT to detect an abnormality of the MCU, a reset circuit to reset the MCU when the external WDT detects the abnormality of the MCU, and an ON/OFF control section to turn a gate of the semiconductor switching device on or off in accordance with the external WDT. The inverter is stopped by turning the gate off via the ON/OFF control section when the external WDT is a disable state. When the abnormality of the MCU is not detected in an enable state, the inverter is driven by turning the gate on via the ON/OFF control section. When the abnormality of the MCU is detected, the inverter is stopped by turning the gate off via the ON/OFF control section and the MCU is reset by the reset circuit.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: November 12, 2019
    Assignees: NSK LTD., TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shin Kumagai, Nobuhiko Ando, Kyosho Uryu, Takahiro Yamazaki
  • Patent number: 10457321
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: October 29, 2019
    Assignee: NSK LTD.
    Inventors: Shin Kumagai, Kyosho Uryu, Nobuhiko Ando
  • Patent number: 10377413
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: August 13, 2019
    Assignee: NSK LTD.
    Inventors: Shin Kumagai, Kyosho Uryu, Nobuhiko Ando
  • Publication number: 20190031232
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 31, 2019
    Applicant: NSK LTD.
    Inventors: Shin KUMAGAI, Kyosho URYU, Nobuhiko ANDO
  • Publication number: 20190023316
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Applicant: NSK LTD.
    Inventors: Shin KUMAGAI, Kyosho URYU, Nobuhiko ANDO
  • Publication number: 20190023317
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Applicant: NSK LTD.
    Inventors: Shin KUMAGAI, Kyosho URYU, Nobuhiko ANDO
  • Patent number: 10176838
    Abstract: A cross section of a luminous flux of returning light from a disc is split into a plurality of regions, and an operation is performed so that a weighting of a light amount of a region which has favorable symmetry in a radial direction and is formed on a circumference of an ellipse among the split regions is increased. Further, a lens shift detection signal is formed, and a lens shift detection signal is canceled from a push-pull signal.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: January 8, 2019
    Assignee: Sony Corporation
    Inventors: Noriaki Nishi, Kimihiro Saito, Nobuhiko Ando, Fumiaki Nakano, Yuuichi Suzuki, Hiroaki Nakagawa, Tetsuya Inoue, Yutaka Tentaku
  • Publication number: 20180339726
    Abstract: An electronic control unit where an external watch dog timer (WDT) can always normally detect an abnormality (a failure) to a micro controller unit (MCU) related to a built-in self-test (BIST) function and which can maintain safety of a system. The control unit includes an external WDT to detect an abnormality of the MCU, a reset circuit to reset the MCU when the external WDT detects the abnormality of the MCU, and an ON/OFF control section to turn a gate of the semiconductor switching device on or off in accordance with the external WDT. The inverter is stopped by turning the gate off via the ON/OFF control section when the external WDT is a disable state. When the abnormality of the MCU is not detected in an enable state, the inverter is driven by turning the gate on via the ON/OFF control section. When the abnormality of the MCU is detected, the inverter is stopped by turning the gate off via the ON/OFF control section and the MCU is reset by the reset circuit.
    Type: Application
    Filed: November 22, 2016
    Publication date: November 29, 2018
    Applicants: NSK Ltd., TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shin KUMAGAI, Nobuhiko ANDO, Kyosho URYU, Takahiro YAMAZAKI
  • Publication number: 20180315448
    Abstract: A cross section of a luminous flux of returning light from a disc is split into a plurality of regions, and an operation is performed so that a weighting of a light amount of a region which has favorable symmetry in a radial direction and is formed on a circumference of an ellipse among the split regions is increased. Further, a lens shift detection signal is formed, and a lens shift detection signal is canceled from a push-pull signal.
    Type: Application
    Filed: April 20, 2016
    Publication date: November 1, 2018
    Applicant: SONY CORPORATION
    Inventors: Noriaki Nishi, Kimihiro Saito, Nobuhiko Ando, Fumiaki Nakano, Yuuichi Suzuki, Hiroaki Nakagawa, Tetsuya Inoue, Yutaka Tentaku
  • Patent number: 10093351
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 9, 2018
    Assignee: NSK LTD.
    Inventors: Shin Kumagai, Kyosho Uryu, Nobuhiko Ando
  • Publication number: 20180208237
    Abstract: An electronic control unit diagnoses a short failure of an inverter FETs and diagnoses whether the failure of the FET-short detecting section has occurred. The unit controls a motor through an inverter including a bridge having an upper-stage FETs and a lower-stage FETs via an MCU, having: an FET-short detecting section to detect a short failure of the upper-stage FETs and the lower-stage FETs based on respective connection point voltages of the upper-stage FETs and the lower-stage FETs; and a diagnostic function to detect a failure of the FET-short detecting section. The diagnostic function diagnoses the failure of the FET-short detecting section at start up and turns-OFF the upper-stage FETs and the lower-stage FETs when the failure is detected. The FET-short detecting section diagnoses the short failure of the upper-stage FETs and the lower-stage FETs when the failure of the FET-short detecting section is not detected.
    Type: Application
    Filed: August 5, 2016
    Publication date: July 26, 2018
    Applicant: NSK LTD.
    Inventors: Shin KUMAGAI, Kyosho URYU, Nobuhiko ANDO
  • Patent number: 10014023
    Abstract: Provided is an optical medium reproducing apparatus including: a detection unit that divides a luminous flux into a plurality of regions including a first region and a second region which are different in a position in a radial direction and/or a tangential direction, and combines a plurality of detection signals in correspondence with the amount of light that is incident to each of the plurality of regions with combination patterns which are selected to form signals of a plurality of channels; a multi-input equalizer unit that includes a plurality of equalizer units to which the signals of the plurality of channels are respectively supplied, computes outputs of the plurality of equalizer units, and outputs the resultant value as an equalization signal; and a binarization unit that performs binarization processing with respect to the equalization signal to obtain binary data.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: July 3, 2018
    Assignee: SONY CORPORATION
    Inventors: Noriaki Nishi, Kimihiro Saito, Nobuhiko Ando, Junya Shiraishi, Yutaka Tentaku
  • Patent number: 9990952
    Abstract: There is provided an optical medium reproducing device configured to optically reproduce an optical medium including a plurality of tracks formed, the optical medium reproducing device including: an optical filter configured to receive an incident returned light beam from the optical medium, and to spatially and optically form a plurality of signals having different bands in a tangential direction and a radial direction; an arithmetic unit configured to operate the plurality of first signals formed by the optical filter so as to form a plurality of channels of second signals; and an electrical filter configured to individually receive the second signals, and to perform processing to the second signals so as to acquire a reproduced signal.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: June 5, 2018
    Assignee: Sony Corporation
    Inventors: Noriaki Nishi, Kimihiro Saito, Junya Shiraishi, Nobuhiko Ando
  • Publication number: 20180096703
    Abstract: There is provided an optical medium reproducing device configured to optically reproduce an optical medium including a plurality of tracks formed, the optical medium reproducing device including: an optical filter configured to receive an incident returned light beam from the optical medium, and to spatially and optically form a plurality of signals having different bands in a tangential direction and a radial direction; an arithmetic unit configured to operate the plurality of first signals formed by the optical filter so as to form a plurality of channels of second signals; and an electrical filter configured to individually receive the second signals, and to perform processing to the second signals so as to acquire a reproduced signal.
    Type: Application
    Filed: December 9, 2015
    Publication date: April 5, 2018
    Applicant: Sony Corporation
    Inventors: Noriaki Nishi, Kimihiro Saito, Junya Shiraishi, Nobuhiko Ando
  • Publication number: 20180053997
    Abstract: Synthesizers (32, 24) for synthesizing feedback signals output from a plurality of antenna modules (4) are provided. A distortion compensation signal output unit (15) derives, from a difference between a feedback signal synthesized by the synthesizers (32, 24) and a base band signal output from a modulation unit (12), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit (13).
    Type: Application
    Filed: April 1, 2016
    Publication date: February 22, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hifumi NOTO, Nobuhiko ANDO, Hideyuki NAKAMIZO, Morishige HIEDA, Hideki MORISHIGE