Patents by Inventor Nobuhiro Jiwari

Nobuhiro Jiwari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7052624
    Abstract: The present invention provides a manufacturing method for an electronic device that enables high-yield manufacturing of electronic devices, by detecting potential short circuits between a contact plug and a conductive part contacting the periphery of the contact plug, directly after forming the contact plug; and the electronic device. The manufacturing method includes a hole-forming step of forming a contact hole in an insulating film that covers a conductive part formed on a first main surface of a substrate and an area surrounding the conductive part, the hole being formed beside the conductive part, and the conductive part including a first material; a material-supplying step of supplying a second material to the contact hole, the second material having a reactive property with the first material; and an inspection step, after the second material has been supplied, of inspecting for evidence of a reaction by the conductive part with the second material.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: May 30, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuya Matsutani, Nobuhiro Jiwari
  • Patent number: 6939806
    Abstract: The etching method of the present invention for forming a hole having a high aspect ratio in a silicon oxide film formed on a substrate via a silicon nitride film includes the step of performing etching using an etching gas composed of a mixture of Ar gas, O2 gas, C5F8 gas and CH2F2 gas.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: September 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Nobuhiro Jiwari
  • Patent number: 6856020
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 15, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6787445
    Abstract: A fluorine-containing organic film is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. The fluorine-containing organic film is then exposed to plasma of a rare gas in the same reactor chamber to densify the fluorine-containing organic film.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industry Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20040058535
    Abstract: The present invention provides a manufacturing method for an electronic device that enables high-yield manufacturing of electronic devices, by detecting potential short circuits between a contact plug and a conductive part contacting the periphery of the contact plug, directly after forming the contact plug; and the electronic device. The manufacturing method includes a hole-forming step of forming a contact hole in an insulating film that covers a conductive part formed on a first main surface of a substrate and an area surrounding the conductive part, the hole being formed beside the conductive part, and the conductive part including a first material; a material-supplying step of supplying a second material to the contact hole, the second material having a reactive property with the first material; and an inspection step, after the second material has been supplied, of inspecting for evidence of a reaction by the conductive part with the second material.
    Type: Application
    Filed: July 17, 2003
    Publication date: March 25, 2004
    Inventors: Tetsuya Matsutani, Nobuhiro Jiwari
  • Patent number: 6703711
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: March 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20040005789
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing C5F8, C3F6, or C4F6 as a main component.
    Type: Application
    Filed: June 23, 2003
    Publication date: January 8, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6669812
    Abstract: The present invention provides various measures for preventing particles from being deposited on objects being processed during plasma processing. An electrode is disposed inside a reaction chamber, which is kept in a vacuum state by a turbo molecule pump and a dry pump that are provided for a main exhaust pipe. A substrate is placed on the electrode, a gas is introduced into the reaction chamber and then a voltage is applied from an RF power supply to the electrode and the substrate, thereby generating plasma regions in the reaction chamber. A large number of exhaust pipes, each having an opening, are disposed on substantially the same plane as the plane on which the interface between a plasma glow region and a plasma sheath is located. These multiple openings surround the interface between the plasma glow region and the plasma sheath.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: December 30, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Nobuhiro Jiwari
  • Publication number: 20030094698
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Application
    Filed: December 30, 2002
    Publication date: May 22, 2003
    Applicant: Matsushita Electronics Corporation
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20030077909
    Abstract: The etching method of the present invention for forming a hole having a high aspect ratio in a silicon oxide film formed on a substrate via a silicon nitride film includes the step of performing etching using an etching gas composed of a mixture of Ar gas, O2 gas, C5F8 gas and CH2F2 gas.
    Type: Application
    Filed: October 23, 2002
    Publication date: April 24, 2003
    Inventor: Nobuhiro Jiwari
  • Patent number: 6518169
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: February 11, 2003
    Assignee: Matsushita Electric Industrial co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20030025209
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Application
    Filed: September 27, 2002
    Publication date: February 6, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6500769
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: December 31, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20010047849
    Abstract: In performing plasma processing, when plasma regions are extinguished, particles tend to fall onto an object to be processed and then be deposited thereon. The present invention provides various measures for preventing such deposition on the object. An electrode is disposed inside a reaction chamber, which is kept in a vacuum state by a turbo molecule pump and a dry pump that are provided for a main exhaust pipe. A substrate is placed on the electrode, a gas is introduced into the reaction chamber and then a voltage is applied from an RF power supply to the electrode and the substrate, thereby generating plasma regions in the reaction chamber. A large number of exhaust pipes, each having an opening, are disposed on substantially the same plane as the plane on which the interface between a plasma glow region and a plasma sheath is located. These multiple openings surround the interface between the plasma glow region and the plasma sheath.
    Type: Application
    Filed: September 1, 1998
    Publication date: December 6, 2001
    Inventors: NOBUHIRO JIWARI, SHINICHI IMAI
  • Publication number: 20010008124
    Abstract: The substrate cooling apparatus disclosed in the present invention comprises a semiconductor substrate holding electrode with a groove for conducting cooling gas formed in its holding surface for holding a semiconductor substrate thereon, wherein an inlet port for the substrate cooling gas is formed within 5 mm of the radially outermost edge of the semiconductor substrate holding electrode in such a manner as to connect with the groove from a surface of the electrode other than the holding surface thereof. When the semiconductor substrate is cooled by the substrate cooling apparatus, temperature difference within the substrate surface is small, and the substrate temperature is uniform through to the peripheral portions of the substrate. When this substrate cooling apparatus is used in a semiconductor manufacturing apparatus, semiconductor devices with stable device characteristics can be fabricated on the semiconductor substrate.
    Type: Application
    Filed: April 29, 1997
    Publication date: July 19, 2001
    Inventors: NOBUHIRO JIWARI, SHINICHI IMAI, HIDEO NIKOH
  • Patent number: 6251216
    Abstract: A plasma processing apparatus includes a reaction chamber in which plasma is generated from a reactive gas introduced thereto and a film on a substrate is processed with the plasma generated. The main members of the reaction chamber are covered with protective members made of synthetic quartz.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: June 26, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Hideaki Okamura, Shinichi Imai, Nobuhiro Jiwari, Yoko Tohmori
  • Patent number: 6214740
    Abstract: A manufacturing apparatus for semiconductor devices comprises as a halogen scavenger a silicon ring (12) having an average surface roughness of 1-1000 &mgr;m, arranged around a silicon substrate (6) on a lower electrode (3) in a reaction chamber (7); and an upper silicon element (5) as another halogen scavenger, having an average surface roughness of 1-1000 &mgr;m, arranged above the silicon substrate (6). In this apparatus, C2F6 is used as a gas to be introduced into the chamber (7) and fluorine can be effectively scavenged in the initial phase of operation, so that semiconductor devices can be aged faster than in conventional apparatus.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: April 10, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinichi Imai, Hideo Nikoh, Nobuhiro Jiwari
  • Patent number: 6069092
    Abstract: The present invention discloses a dry etching method using a high density plasma, in which a fluorocarbon gas, whose fluorine to carbon ratio is less than 2:1, is used. Such arrangement provides improved etching selectivity ratios to the resist film. The adding of an inert gas and oxygen to such a fluorocarbon gas provides further improved etching selectivity ratios and improved etching rates.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: May 30, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinichi Imai, Nobuhiro Jiwari
  • Patent number: 6057247
    Abstract: A method for fabricating a semiconductor device according to the present invention includes the steps of: forming an oxide film on a substrate having a silicon region at least on the surface thereof; defining a resist pattern on the oxide film; placing the substrate on an electrode provided inside a reaction chamber of a plasma etching apparatus, and etching the oxide film by using plasma generated from a gas including a fluorocarbon gas with a bias voltage applied to the substrate; and removing fluorine from the reaction chamber by generating oxygen plasma inside the reaction chamber with substantially no bias voltage applied to the substrate.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: May 2, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinichi Imai, Nobuhiro Jiwari
  • Patent number: 5989929
    Abstract: A reactor is composed of a lower frame of a chamber, a quartz dome, an upper electrode, an 0 ring, and the like. A lower electrode and a substrate as a workpiece to be processed thereon are disposed in the reactor. The temperature of the quartz dome is maintained at a temperature of 180.degree. C. or higher by means of a heater. Fluorocarbon gas such as C.sub.2 F.sub.6 gas or C.sub.4 F.sub.8 gas is introduced into the reactor through a gas inlet and RF power from a first RF power source is applied to an antenna coil to produce a plasma and thereby etch an oxide film on the substrate. By heating the quartz dome to a high temperature, a deposit which hinders the release of oxygen from a wall face is prevented from being attached and the deposit on the bottom of the hole which causes an etch stop during processing is removed with oxygen. This prevents the etch stop during an etching process for forming a deep hole.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: November 23, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Hideo Nikoh, Shinichi Imai, Nobuhiro Jiwari, Satoshi Nakagawa, Shoji Matsumoto, Yoji Bito