Patents by Inventor Nobuhiro Kasa
Nobuhiro Kasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7642618Abstract: Semiconductor devices are provided with high performance high-frequency circuits in which interference caused by inductors is reduced. In a semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.Type: GrantFiled: July 19, 2005Date of Patent: January 5, 2010Assignee: Renesas Technology Corp.Inventors: Nobuhiro Shiramizu, Takahiro Nakamura, Toru Masuda, Nobuhiro Kasa, Hiroshi Mori
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Patent number: 7095999Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: GrantFiled: November 7, 2002Date of Patent: August 22, 2006Assignee: Renesas Technology Corp.Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori
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Publication number: 20060038621Abstract: Semiconductor devices provided with high performance high-frequency circuits that reduce interference caused by inductors are provided. In the semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.Type: ApplicationFiled: July 19, 2005Publication date: February 23, 2006Inventors: Nobuhiro Shiramizu, Takahiro Nakamura, Toru Masuda, Nobuhiro Kasa, Hiroshi Mori
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Patent number: 6621108Abstract: Disclosed herein is a semiconductor device wherein a thyristor protective element and a trigger element are provided in a semiconductor layer formed on a buried insulating layer, and a trigger electrode (gate) of the thyristor protective element and a back gate of the trigger element are provided in the same p well and electrically connected to each other to thereby drive the thyristor protective element based on a substrate current produced by the breakdown of the trigger element.Type: GrantFiled: March 13, 2001Date of Patent: September 16, 2003Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Yoshiyasu Tashiro, Nobuhiro Kasa, Kousuke Okuyama, Hiroyasu Ishizuka
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Publication number: 20030060183Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: ApplicationFiled: November 7, 2002Publication date: March 27, 2003Applicant: Hitachi, Ltd.Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori
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Patent number: 6501330Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: GrantFiled: March 5, 2002Date of Patent: December 31, 2002Assignee: Hitachi, Ltd.Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori
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Publication number: 20020079958Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: ApplicationFiled: March 5, 2002Publication date: June 27, 2002Applicant: Hitachi, Ltd.Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori
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Patent number: 6384676Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: GrantFiled: February 22, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori
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Publication number: 20010025963Abstract: Disclosed herein is a semiconductor device wherein a thyristor protective element and a trigger element are provided in a semiconductor layer formed on a buried insulating layer, and a trigger electrode (gate) of the thyristor protective element and a back gate of the trigger element are provided in the same p well and electrically connected to each other to thereby drive the thyristor protective element based on a substrate current produced by the breakdown of the trigger element.Type: ApplicationFiled: March 13, 2001Publication date: October 4, 2001Inventors: Yoshiyasu Tashiro, Nobuhiro Kasa, Kousuke Okuyama, Hiroyasu Ishizuka
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Publication number: 20010017568Abstract: A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to be easily affected by a noise generated by the oscillation circuit, being most likely led to a malfunction are created on a single semiconductor substrate with the first and second circuit blocks separated from each other. To put it more concretely, the first and second circuit blocks are respectively created in a first island area and a second island area on the surface of the semiconductor substrate. The first and second island areas are each enclosed by an insulating isolation band. A low-resistance semiconductor area is created in a base area excluding locations occupied by active elements in the first and second island areas and is connected to a stable voltage terminal.Type: ApplicationFiled: February 22, 2001Publication date: August 30, 2001Inventors: Nobuhiro Kasa, Yoshiyasu Tashiro, Kazuaki Hori