Abstract: The present invention provides a method of cooling a hot-rolled steel strip which has passed through a finishing rolling, including: cooling the hot-rolled steel strip from a first temperature of not lower than 600° C. and not higher than 650° C. to a second temperature of not higher than 450° C. with cooling water having the water amount density of not lower than 4 m3/m2/min and not higher than 10 m3/m2/min, wherein with respect to the area of the target surface, the area of a portion where a plurality of spray jets of the cooling water directly strikes on the target surface is at least 80%.

Abstract: The present invention provides a method of cooling a hot-rolled steel strip which has passed through a finishing rolling, including: cooling the hot-rolled steel strip from a first temperature of not lower than 600° C. and not higher than 650° C. to a second temperature of not higher than 450° C. with cooling water having the water amount density of not lower than 4 m3/m2/min and not higher than 10 m3/m2/min, wherein with respect to the area of the target surface, the area of a portion where a plurality of spray jets of the cooling water directly strikes on the target surface is at least 80%.

Abstract: The present invention provides a method of cooling a hot-rolled steel strip which has passed through a finishing rolling, including: cooling the hot-rolled steel strip from a first temperature of not lower than 600° C. and not higher than 650° C. to a second temperature of not higher than 450° C. with cooling water having the water amount density of not lower than 4 m3/m2/min and not higher than 10 m3/m2/min, wherein with respect to the area of the target surface, the area of a portion where a plurality of spray jets of the cooling water directly strikes on the target surface is at least 80%.

Abstract: The present invention provides a method of cooling a hot-rolled steel strip which has passed through a finishing rolling, including: cooling the hot-rolled steel strip from a first temperature of not lower than 600° C. and not higher than 650° C. to a second temperature of not higher than 450° C. with cooling water having the water amount density of not lower than 4 m3/m2/min and not higher than 10 m3/m2/min, wherein with respect to the area of the target surface, the area of a portion where a plurality of spray jets of the cooling water directly strikes on the target surface is at least 80%.

Abstract: The dynamic DC offset canceling apparatus includes: section 104 that detects dynamic DC offset in longest overlapping part sequences from the differences between the sampling values of a first longest overlapping part sequence and the sampling values of a second longest overlapping part sequence, the first longest overlapping part sequence and the second longest overlapping part sequence being overlapping part sequences in a training sequence of the received signal; section 105 that detects dynamic DC offset outside the longest overlapping part sequences from the difference between an average value of sampling values of a received signal which exists in a burst before the first longest overlapping part sequence, and an average value of sampling values of a received signal which exists in a burst after the second longest overlapping part sequence; and section 106 that adaptively subtracts a DC offset value from the received signal based on these results.

Abstract: A dynamic DC offset removal apparatus and a dynamic DC offset removal method capable of accurately estimating a change position of a dynamic DC offset and a DC offset value before the change and a DC offset value after the change, thereby carrying out equalization processing on a reception signal whose dynamic DC offsets are removed, and improving a bit error rate characteristic.

Abstract: The dynamic DC offset canceling apparatus includes: section 104 that detects dynamic DC offset in longest overlapping part sequences from the differences between the sampling values of a first longest overlapping part sequence and the sampling values of a second longest overlapping part sequence, the first longest overlapping part sequence and the second longest overlapping part sequence being overlapping part sequences in a training sequence of the received signal; section 105 that detects dynamic DC offset outside the longest overlapping part sequences from the difference between an average value of sampling values of a received signal which exists in a burst before the first longest overlapping part sequence, and an average value of sampling values of a received signal which exists in a burst after the second longest overlapping part sequence; and section 106 that adaptively subtracts a DC offset value from the received signal based on these results.

Abstract: A Viterbi decoder capable of supporting a variety of constraint lengths and any arbitrary number of coefficients of a given estimated transmission path and composed of special hardware of small circuit scale. In the Viterbi decoder of the present invention, a branch metric calculation section (101) calculates the branch metrics of all paths from the state of the previous time to the state at the present time, selects the most probable path from the paths arriving at respective states based on the branch metrics (101a) and path metrics (103a) and outputs path select signal (102a) and path metric (102b). Path metric storage section (103) outputs path metric (103a) to be input to ACS calculation section (102) when performing ACS calculating at the next time.

Abstract: A dynamic DC offset removal apparatus and a dynamic DC offset removal method capable of accurately estimating a change position of a dynamic DC offset and a DC offset value before the change and a DC offset value after the change, thereby carrying out equalization processing on a reception signal whose dynamic DC offsets are removed, and improving a bit error rate characteristic.

Abstract: A Viterbi decoder capable of supporting a variety of constraint lengths and any arbitrary number of coefficients of a given estimated transmission path and composed of special hardware of small circuit scale. In the Viterbi decoder of the present invention, a branch metric calculation section (101) calculates the branch metrics of all paths from the state of the previous time to the state at the present time, selects the most probable path from the paths arriving at respective states based on the branch metrics (101a) and path metrics (103a) and outputs path select signal (102a) and path metric (102b). Path metric storage section (103) outputs path metric (103a) to be input to ACS calculation section (102) when performing ACS calculating at the next time.