Abstract: A frame synchronization system includes a synchronization detector supplied with a digital signal including frame synchronizing pulses for outputting the digital signal in a frame synchronization state, an adding part for adding a forward guard identification code to the digital signal output from the synchronization detector when a forward guard information is received from the synchronization detector, a first memory for storing the digital signal including the forward guard identification code output from the adding part, a detector for monitoring the digital signal read out from the first memory and for outputting forward guard detection information when the digital signal read out from the first memory includes the forward guard identification code, a second memory for storing the digital signal read out from the first memory in response to a control signal, where the digital signal read out from the second memory is output as an output signal of the frame synchronization system, and a controller for pro

Abstract: A variable level converter comprising a first variable level converting unit, a second variable level converting unit and an amplifying transistor connected therebetween. Each of the first and second variable level converting units comprises an inverted L-type variable attenuator which includes a variable impedance element. Each variable impedance element is controlled by the same level control signal and has the same electric characteristics.