Patents by Inventor Nobuhito SHIRAISHI

Nobuhito SHIRAISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402494
    Abstract: A semiconductor device includes a wiring layer, a dielectric layer covering the wiring layer, a thin film resistor provided on the dielectric layer, and a plug electrode connecting the thin film resistor to the wiring layer. The plug electrode includes a barrier layer and a buried layer. The buried layer is configured by the filling portion filling a region surrounded by a first incline surface, and an extension portion extending from the filling portion along a second incline surface. The thin film resistor is in contact with the filling portion and the extension portion of the plug electrode. A second incline angle between the second incline surface and a main surface of a semiconductor substrate is smaller than a first incline angle between the first incline surface and the main surface of the semiconductor substrate.
    Type: Application
    Filed: April 3, 2023
    Publication date: December 14, 2023
    Inventor: Nobuhito SHIRAISHI
  • Publication number: 20230343701
    Abstract: A semiconductor device includes first and second interlayer insulating films, first and second wirings, and a resistor film. The first wiring is disposed on the first interlayer insulating film. The second interlayer insulating film includes a first layer and a second layer. The first layer is disposed on the first interlayer insulating film so as to cover the first wiring. The resistor film is disposed on the first layer. The resistor film contains at least one selected from the group consisting of silicon chromium, silicon chromium into which carbon is introduced, nickel chromium, titanium nitride and tantalum nitride. The second layer is disposed on the first layer so as to cover the resistor film. The second wiring is disposed on the second layer. The resistor film is closer to the first wiring than to the second wiring in a thickness direction of the second interlayer insulating film.
    Type: Application
    Filed: February 27, 2023
    Publication date: October 26, 2023
    Inventors: Nobuhito SHIRAISHI, Naohito SUZUMURA
  • Publication number: 20230343700
    Abstract: A semiconductor device includes a plurality of resistive films arranged on an interlayer dielectric film. Each of the plurality of resistive films extends in a first direction in plan view. The plurality of resistive films are arranged spaced apart in a second direction orthogonal to the first direction in plan view. The plurality of resistive films are divided into a first group, a second group, and a third group. The first group is located between the second group and the third group in the second direction. A second width variation amount of each of the plurality of second resistive films belonging to the second group and a third width variation amount of each of the plurality of third resistive films belonging to the third group are larger than a first width variation amount of each of the plurality of first resistive films belonging to the first group.
    Type: Application
    Filed: February 2, 2023
    Publication date: October 26, 2023
    Inventors: Nobuhito SHIRAISHI, Yasuo MORIMOTO, Yoshihiro FUNATO
  • Publication number: 20230116260
    Abstract: A resistor material including a plurality of crystalline phases having a positive temperature coefficient of resistance, and an amorphous phase having a negative temperature coefficient of resistance and having a resistivity higher than the crystalline phase, in a mixed state, is provided. Moreover, a resistor element having a resistor film configured by the resistor material described above, and a method of manufacturing a resistor element by forming a film of an amorphous material having a negative temperature coefficient of resistance and subjecting this film to an annealing treatment to obtain the resistor element described above, are provided.
    Type: Application
    Filed: August 22, 2022
    Publication date: April 13, 2023
    Inventors: Nozomi ITO, Yorinobu KUNIMUNE, Kenichiro ABE, Nobuhito SHIRAISHI
  • Publication number: 20230112824
    Abstract: A semiconductor device includes resistor layers, and a wiring layer which is disposed at least either above or below the resistor layers. The resistor layers include first resistor layers and second resistor layers each having a width in a first direction smaller than a width of the first resistor layer in a first direction. The wiring layer includes first overlapping regions in which the wiring layer overlaps with the first resistor layers in plan view and second overlapping regions in which the wiring layer overlaps with the second resistor layers in plan view. A value obtained by dividing a total value of areas of the second overlapping regions by a width of the second resistor layer is smaller than a value obtained by dividing a total value of areas of the first overlapping regions by a width of the first resistor layer.
    Type: Application
    Filed: August 31, 2022
    Publication date: April 13, 2023
    Inventor: Nobuhito SHIRAISHI
  • Publication number: 20230097408
    Abstract: A semiconductor device includes an insulating layer, a first conductive film, a second conductive film and a thin-film resistor. The insulating layer has a penetrating portion. The first conductive film is formed in the penetrating portion such that a recess is formed at an upper part of the penetration portion. The second conductive film is formed on an upper surface of the first conductive film and an inner surface of the penetrating portion. The thin-film resistor includes silicon and metal. The thin-film resistor is formed on the second conductive film and the insulating layer.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 30, 2023
    Inventors: Nozomi ITO, Kazuyoshi MAEKAWA, Yuji TAKAHASHI, Yasuaki TSUCHIYA, Nobuhito SHIRAISHI