Patents by Inventor Nobuhito Toyama

Nobuhito Toyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060141365
    Abstract: A planar pattern (11), having a plurality of apertures of the same size (Wx×Wy), is determined by a two-dimensional layout determination tool (10), and a three-dimensional structure, having a depth d and an undercut amount Uc for making the phase of the transmitted light be shifted by 180 degrees with every even-numbered aperture, is determined by a three-dimensional structure determination tool (20). Simulation of transmitted light is executed for a structural body having the planar pattern (11) and the three-dimensional structure (21) by a three-dimensional simulator (30) to determine the light intensity deviation D of transmitted light for an odd-numbered aperture without a trench and an even-numbered aperture with a trench. At a two-dimensional simulator (40), simulations using a two-dimensional model prepared based on this deviation D are performed to determine a correction amount ? for making the deviation D zero and obtain a new planar pattern (12).
    Type: Application
    Filed: December 10, 2002
    Publication date: June 29, 2006
    Inventors: Nobuhito Toyama, Yasutaka Morikawa, Kei Mesuda
  • Patent number: 7067221
    Abstract: The work load spent on designing a trench-type, Levenson-type phase shift mask is lightened and the working time for the designing process is shortened. A pattern 11, having a plurality of apertures, is designed by means of a designing tool 10. In a database 30 are prepared optimal functions that indicate optimal combinations of undercut amounts Uc and bias correction amounts ? according to each set of dimension conditions. An optimal function extraction tool 20 extracts optimal functions Fp and Fs that are matched with dimension conditions Mp and Ms on pattern 11, and determining tool 40 determines optimal values of the undercut amount Uc and the bias correction amount ? based on the extracted optimal function. A three-dimensional structure determining tool 50 determines a three-dimensional structural body 13, having a depth d and the undercut amount Uc, for an aperture by which the phase of transmitted light is shifted by 180 degrees.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: June 27, 2006
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Kei Mesuda, Nobuhito Toyama
  • Publication number: 20050262468
    Abstract: The work load spent on designing a trench-type, Levenson-type phase shift mask is lightened and the working time for the designing process is shortened. A pattern 11, having a plurality of apertures, is designed by means of a designing tool 10. In a database 30 are prepared optimal functions that indicate optimal combinations of undercut amounts Uc and bias correction amount ? according to each set of dimension conditions. An optimal function extraction tool 20 extracts optimal functions Fp and Fs that are matched with dimension conditions Mp and Ms on pattern 11, and determining tool 40 determines optimal values of the undercut amount Uc and the bias correction amount ? based on the extracted optimal function. A three-dimensional structure determining tool 50 determines a three-dimensional structural body 13, having a depth d and the undercut amount Uc, for an aperture by which the phase of transmitted light is shifted by 180 degrees.
    Type: Application
    Filed: June 8, 2005
    Publication date: November 24, 2005
    Inventors: Kei Mesuda, Nobuhito Toyama
  • Publication number: 20050074579
    Abstract: An antireflection structure (10) comprises a base (1), and a finely roughened antireflection part (2) formed in a surface of the base (1). The finely roughened antireflection part (2) includes a plurality of projections and depressions defined by the projections. The projections are distributed such that PMAX??MIN, where PMAX is the biggest one of distances between tips (2t) of the adjacent projections and ?MIN is the shortest one of wavelengths of visible light rays in a vacuum. The sectional area of each projection in a plane parallel to the surface of the base (1) increases continuously from the tip (2t) toward the bottom (2b) of the depression adjacent to the projection. The shape (2Mt) of a tip part (Mt) of each projection in a plane perpendicular to the surface of the base (1) is sharper than the shape (2Mb) of a bottom part (Mb) of each depression in the same plane vertical to the surface of the base (1).
    Type: Application
    Filed: February 20, 2003
    Publication date: April 7, 2005
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Toshiyuki Suzuki, Arimichi Ito, Nobuhito Toyama
  • Patent number: 6821683
    Abstract: A method for correcting design pattern data of a semiconductor circuit in which, in the middle of miniaturization and high density of a mask pattern being developed, a technique of correction is applied at a practical level in which the correction of design pattern data in the formation of fine patterns on a semiconductor wafer is associated with the correction of design patterns in the fabrication of a photomask.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: November 23, 2004
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Nobuhito Toyama, Naoki Shimohakamada, Wakahiko Sakata
  • Publication number: 20040131949
    Abstract: A phase mask comprises a transparent substrate having one surface provided with a pattern of a plurality of grooves. A diffraction grating is formed in an object for an optical medium, including a photosensitive part by exposing the object to UV light containing diffracted light rays to cause the refractive index of the photosensitive part of the object to change by interference fringes produced by interference of diffracted light rays of different orders of diffraction. The pattern of the grooves has a duty ratio adjusted according to the positions of the grooves so that apodization exposure can be achieved when the object is exposed to the UV light through the phase mask.
    Type: Application
    Filed: July 8, 2003
    Publication date: July 8, 2004
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Masaaki Kurihara, Nobuhito Toyama
  • Publication number: 20040101766
    Abstract: The work load spent on designing a trench-type, Levenson-type phase shift mask is lightened and the working time for the designing process is shortened. A pattern 11, having a plurality of apertures, is designed by means of a designing tool 10. In a database 30 are prepared optimal functions that indicate optimal combinations of undercut amounts Uc and bias correction amounts &dgr; according to each set of dimension conditions. An optimal function extraction tool 20 extracts optimal functions Fp and Fs that are matched with dimension conditions Mp and Ms on pattern 11, and determining tool 40 determines optimal values of the undercut amount Uc and the bias correction amount &dgr; based on the extracted optimal function. A three-dimensional structure determining tool 50 determines a three-dimensional structural body 13, having a depth d and the undercut amount Uc, for an aperture by which the phase of transmitted light is shifted by 180 degrees.
    Type: Application
    Filed: February 25, 2003
    Publication date: May 27, 2004
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Kei Mesuda, Nobuhito Toyama
  • Patent number: 6694500
    Abstract: At a level in which high density and miniaturization of wiring of integrated circuits is required to such an extent that optical proximity effect and the correction of optical proximity effect is necessary, a test design pattern having many test patterns corresponding to design conditions is produced, wherein each test pattern can be evaluated at a practical level. A design circuit pattern for test of a semiconductor circuit comprises a circuit pattern having a plurality of circuits formed on a semiconductor wafer wherein each of the circuits is designed for test according to an individual design condition as the object of electrical measurement. The design circuit pattern for test of a semiconductor circuit comprises a group of test cells each formed of a circuit of the object of electrical measurement and evaluation formed according to individual conditions and having a switch or switches connected with on one end or both ends thereof.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: February 17, 2004
    Assignee: Dainippon Printing Co., Ltd.
    Inventor: Nobuhito Toyama
  • Patent number: 6656664
    Abstract: The method of forming a minute focusing lens with respect to over a photoactive area of an image sensor such as a CCD or CMOS, comprising: coating a resist film on a flattening layer formed over the photoactive area of the image sensor; exposing the resist film to light via a photo-mask, and developing the resist film; and patterning the resist film into a lens configuration provides in this invention in order to form a lens having a designed configuration that provides a good light focusing efficiency. The photo-mask is a light transmission type having no light-shading layer. And, this photo-mask is the one having provided thereon a light transmission portion comprising a light refraction material, having on its surface portion a stairs portion, the stairs portion having the phase of a transmission light at its respective position controlled relative to a prescribed width so that a desired light intensity distribution may be obtained at the surface of the photo-mask light-exposed portion.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: December 2, 2003
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yoichi Takahashi, Nobuhito Toyama, Hiroyuki Matsui
  • Patent number: 6560767
    Abstract: A process for making photomask pattern data comprises the steps of: (a) a first step for fetching original data of design data as digital data; (b) a second step for extracting the information on distortion (deformation) of formed pattern of from the original figure data when producing a photomask using the original figure data; (c) a third step for extracting the information on the information on distortion (deformation) of formed pattern when producing a pattern on a wafer using the photomask; (d) a fourth step for obtaining the information for determining parts to be corrected and the amount of correction by combining the information obtained in the second step and the information obtained in the third step; and (e) a fifth step for generating the correction figure for correction applied to the original figure data of design data, on the basis of the information obtained in the fourth step, so that correction pattern data is obtained.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: May 6, 2003
    Assignee: Dainippon Printing Co., Ltd.
    Inventors: Nobuhito Toyama, Naoki Shimohakamada, Wakahiko Sakata
  • Publication number: 20030059725
    Abstract: The method of forming a minute focusing lens with respect to over a photoactive area of an image sensor such as a CCD or CMOS, comprising: coating a resist film on a flattening layer formed over the photoactive area of the image sensor; exposing the resist film to light via a photo-mask, and developing the resist film; and patterning the resist film into a lens configuration provides in this invention in order to form a lens having a designed configuration that provides a good light focusing efficiency. The photo-mask is a light transmission type having no light-shading layer. And, this photo-mask is the one having provided thereon a light transmission portion comprising a light refraction material, having on its surface portion a stairs portion, the stairs portion having the phase of a transmission light at its respective position controlled relative to a prescribed width so that a desired light intensity distribution may be obtained at the surface of the photo-mask light-exposed portion.
    Type: Application
    Filed: September 26, 2002
    Publication date: March 27, 2003
    Inventors: Yoichi Takahashi, Nobuhito Toyama, Hiroyuki Matsui
  • Patent number: 6523163
    Abstract: A method for writing a photomask with additional patterns for making a photomask having uniform pattern density is provided, wherein the method for writing a photomask with additional patterns can be applied for a usual method of writing in which position of writing a positive resist is used and the writing is made by applying an electron beam or a laser beam to the positive resist and a method for forming pattern data used therefor is provided. This invention provides a method for writing a photomask with additional patterns which make uniform the pattern density of the photomask, wherein a positive resist is used, and an electron beam or a laser beam is applied to parts having no pattern data.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: February 18, 2003
    Assignee: Dainippon Printing Co., Ltd.
    Inventor: Nobuhito Toyama
  • Publication number: 20020194576
    Abstract: A method of evaluating of evaluating of the exposure property of data to wafer in which errors of the production of photomask and the formation of patterns caused by defocus in the transfer of data to wafer are considered. Accordingly, errors of the production of photomask and deformation of patterns caused by defocus can be evaluated in the stage of design data.
    Type: Application
    Filed: April 23, 2002
    Publication date: December 19, 2002
    Inventor: Nobuhito Toyama
  • Publication number: 20020110742
    Abstract: A method for correcting design pattern data of a semiconductor circuit in which, in the middle of miniaturization and high density of a mask pattern being developed, a technique of correction is applied at a practical level in which the correction of design pattern data in the formation of fine patterns on a semiconductor wafer is associated with the correction of design patterns in the fabrication of a photomask.
    Type: Application
    Filed: September 24, 2001
    Publication date: August 15, 2002
    Inventors: Nobuhito Toyama, Naoki Shimohakamada, Wakahiko Sakata
  • Publication number: 20020075028
    Abstract: In a level in which high density and miniaturization of wiring of circuit are proceeding in such an extent that optical proximity effect and the correction of optical proximity effect is necessary, a test design pattern having many test patterns corresponding to design conditions is produced, wherein each test pattern can be evaluated at a practical level.
    Type: Application
    Filed: September 24, 2001
    Publication date: June 20, 2002
    Inventor: Nobuhito Toyama
  • Publication number: 20020028523
    Abstract: A process for making photomask pattern data comprises the steps of: (a) a first step for fetching original data of design data as digital data; (b) a second step for extracting the information on distortion (deformation) of formed pattern of from the original figure data when producing a photomask using the original figure data; (c) a third step for extracting the information on the information on distortion (deformation) of formed pattern when producing a pattern on a wafer using the photomask; (d) a fourth step for obtaining the information for determining parts to be corrected and the amount of correction by combining the information obtained in the second step and the information obtained in the third step; and (e) a fifth step for generating the correction figure for correction applied to the original figure data of design data, on the basis of the information obtained in the fourth step, so that correction pattern data is obtained.
    Type: Application
    Filed: May 14, 2001
    Publication date: March 7, 2002
    Inventors: Nobuhito Toyama, Naoki Shimohakamada, Wakahiko Sakata