Abstract: There is presented a semiconductor device including multiple levels of copper interconnects; wherein the surface of a copper interconnect corresponding to at least one underlying layer of another copper interconnect layer is turned into copper oxide to a thickness of 30 nm or more by oxidation conducted at the oxidation rate of 20 nm/min or less, and thereby the reflection of the exposure light from the lower-level copper interconnect is prevented, in forming by means of photolithography a trench to form a copper interconnect through damascening.

Abstract: A method of forming a multi-layer structure over an insulating layer comprises the steps of: selectively depositing a barrier layer on a predetermined region of an insulating layer by use of a first deposition mask; selectively depositing a metal seed layer made of a metal which is different in substance from the barrier layer by use of a second deposition mask, so that the metal seed layer extends not only on an entire surface of the barrier layer but also a peripheral region positioned outside the predetermined region of the insulating layer; and forming a metal plating layer made of the metal as the seed layer, so that the metal layer is adhered on the metal seed layer whereby the metal plating layer is separated from the barrier layer and also from the insulating layer.

Abstract: An image reading system prescans and/or scans a film with magnetic recording and image data to be stored in a film cartridge after the film is developed. The image reading system employs a one-dimensional CCD and is capable of recording/reading retrievable ID numbers on a magnetic recording part. A thumbnail display simultaneously displays all image and magnetic information of all frames of a film, and selected frames to be scanned can be easily identified and compared after obtaining the image data of such film through prescanning. Magnetic recording-information and image information are rapidly read during prescanning and selected frames are then scanned with more refinement as compared to the coarse scanning of the film during prescanning.

Abstract: There is presented a semiconductor device including multiple levels of copper interconnects; wherein the surface of a copper interconnect corresponding to at least one underlying layer of another copper interconnect layer is turned into copper oxide to a thickness of 30 nm or more by oxidation conducted at the oxidation rate of 20 nm/minor less, and thereby the reflection of the exposure light from the lower-level copper interconnect is prevented, in forming by means of photolithography a trench to form a copper interconnect through damascening.

Abstract: In a process for manufacturing a semiconductor device where a plurality of wafers are formed on a single wafer, comprising the steps of forming a groove pattern in an insulating layer on a wafer; forming a seed metal layer in the groove by spattering; depositing an interconnection metal layer on the seed metal layer by electrolytic plating; and then flattering the wafer to the surface of the insulating layer, during forming the groove pattern in the insulating layer, the groove pattern is formed in the area on the wafer where devices can be taken while forming a dummy pattern up to 30 &mgr;m long in the wafer periphery where devices cannot be taken, to prevent the interconnection metal layer from being peeled in the wafer periphery.

Abstract: In a process for manufacturing a semiconductor device where a plurality of wafers are formed on a single wafer, comprising the steps of forming a groove pattern in an insulating layer on a wafer; forming a seed metal layer in the groove by spattering; depositing an interconnection metal layer on the seed metal layer by electrolytic plating; and then flattering the wafer to the surface of the insulating layer, during forming the groove pattern in the insulating layer, the groove pattern is formed in the area on the wafer where devices can be taken while forming a dummy pattern up to 30 &mgr;m long in the wafer periphery where devices cannot be taken, to prevent the interconnection metal layer from being peeled in the wafer periphery.

Abstract: The present invention provides a structure for isolating the reaction forces generated by a planar motor. Specifically, the fixed portion of the reaction motor, which is subject to reaction forces, is structurally isolated from the rest of the system in which the planar motor is deployed. In accordance with one embodiment of the present invention, the fixed portion of the planar motor is separated from the rest of the system and coupled to ground. The rest of the system is isolated from ground by deploying vibration isolation means. Alternatively or in addition, the fixed portion of the planar motor may be structured to move (e.g., on bearings) in the presence of reaction forces, so as to absorb the reaction forces with its inertia. In a further embodiment of the present invention, the fixed portion of the planar motor and the article to be moved are supported by the same frame, with the fixed portion of the planar motor movable on bearings.

Abstract: The present invention discloses a process for manufacturing a semiconductor device in which characteristics of an aluminum alloy film are prevented from deteriorating, when a titanium film is used as an under film and the aluminum alloy film is heated to fill a via hole therewith. Interlayered insulating film is formed on a first aluminum wire, and after the formation of a via hole which reaches the first aluminum wire, a titanium film and an aluminum alloy film are formed in turn by a sputtering process. Next, a silicon substrate is heated up to 450.degree. to 500.degree. C. to melt the aluminum alloy film, thereby filling the via hole therewith. In this case, the thickness of the titanium film is set to 10% or less of the thickness of the aluminum alloy film and at most 25 nm.

Abstract: The present invention relates to a method of fabricating a semiconductor device, which comprises a formation of contact holes in an interlayer insulating film formed on a silicon substrate, formation of a titanium film and a titanium nitride film, as a barrier metal, and lamp annealing. The formation of the titanium nitride film is featured by reactive sputtering using a titanium target whose orientation ratio of (001) plane is not more than 70%. The titanium nitride film thus formed does not shrink rapidly during heat treatment and thus degradation of barrier performance thereof is prevented.