Patents by Inventor Nobumasa Hasegawa
Nobumasa Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10955527Abstract: A radar system includes a transmitter circuit, which transmits a radar wave having a chirp frequency gradually increasing or decreasing to a target, and a frequency conversion circuit, which demodulates a signal of the radar wave reflected at the target by frequency-conversion in correspondence to the chirp frequency. A radar signal processor includes a variable amplifier connected to an output side of the frequency conversion circuit, and a feedback circuit which detects an output of the variable amplifier as a detection signal and feeds back a signal of a frequency band included in the detection signal to an input of the variable amplifier. The feedback circuit is configured to cut off and not cut off a frequency band including a DC offset transient response frequency, which occurs at time of frequency conversion by the frequency conversion circuit, during a specified period and a period other than the specified period, respectively.Type: GrantFiled: April 29, 2019Date of Patent: March 23, 2021Assignee: DENSO CORPORATIONInventors: Tomotoshi Murakami, Nobumasa Hasegawa, Yoshiyuki Utagawa
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Publication number: 20190250246Abstract: A radar system includes a transmitter circuit, which transmits a radar wave having a chirp frequency gradually increasing or decreasing to a target, and a frequency conversion circuit, which demodulates a signal of the radar wave reflected at the target by frequency-conversion in correspondence to the chirp frequency. A radar signal processor includes a variable amplifier connected to an output side of the frequency conversion circuit, and a feedback circuit which detects an output of the variable amplifier as a detection signal and feeds back a signal of a frequency band included in the detection signal to an input of the variable amplifier. The feedback circuit is configured to cut off and not cut off a frequency band including a DC offset transient response frequency, which occurs at time of frequency conversion by the frequency conversion circuit, during a specified period and a period other than the specified period, respectively.Type: ApplicationFiled: April 29, 2019Publication date: August 15, 2019Inventors: Tomotoshi MURAKAMI, Nobumasa HASEGAWA, Yoshiyuki UTAGAWA
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Patent number: 9628076Abstract: A transmission circuit includes a driver circuit that includes: a transistor to regulate output impedance, and a switching circuit that is connected to the transistor to regulate output impedance and switches an output polarity for differential output; and a bias circuit that includes: a first replica circuit including another transistor corresponding to the transistor to regulate output impedance, the bias circuit generating a gate voltage so as to make a current-voltage characteristic of the transistor to regulate output impedance correspond to a first output impedance value, and supply the gate voltage to a gate of the transistor to regulate output impedance.Type: GrantFiled: April 22, 2016Date of Patent: April 18, 2017Assignee: SOCIONEXT INC.Inventor: Nobumasa Hasegawa
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Patent number: 9559697Abstract: A transmitter circuit includes: a driver that includes an output resistor set to a resistance value according to an input code, and that outputs, to an output terminal, an output signal; and a high potential side resistor and a low potential side resistor that are connected to the output terminal. The transmitter circuit further includes a high potential side current source that is set with a current value according to the input code, and a low potential side current source that is set with a current value according to the input code. The transmitter circuit further includes a high potential side switch and a low potential side switch that switch between allowing current output from the high voltage side current source and the low voltage side current source to pass, and blocking the current.Type: GrantFiled: September 2, 2015Date of Patent: January 31, 2017Assignee: SOCIONEXT, INC.Inventors: Shigeaki Kawai, Nobumasa Hasegawa
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Patent number: 9543228Abstract: A semiconductor device includes a semiconductor substrate; an active element configured to be formed on the semiconductor substrate; and a multi-layer wiring structure configured to be formed on the semiconductor substrate. A heat dissipation structure is provided in the multi-layer wiring structure. The upper end of the heat dissipation structure forms an external connection pad to be connected with an external wiring board, and the lower end of the heat dissipation structure makes contact with a surface of the semiconductor substrate outside of an element forming region for the active element.Type: GrantFiled: November 13, 2013Date of Patent: January 10, 2017Assignees: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITEDInventors: Kouichi Kanda, Nobumasa Hasegawa
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Publication number: 20160241235Abstract: A transmission circuit includes a driver circuit that includes: a first transistor to regulate output impedance, and a switching circuit that is connected to the first transistor and switches an output polarity for differential output; and a bias circuit that includes: a first replica circuit including a second transistor corresponding to the first transistor, the bias circuit generating a gate voltage so as to make a current-voltage characteristic of the first transistor correspond to a first output impedance value, and supply the gate voltage to a gate of the first transistor.Type: ApplicationFiled: April 22, 2016Publication date: August 18, 2016Inventor: Nobumasa HASEGAWA
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Publication number: 20160094227Abstract: A transmitter circuit includes: a driver that includes an output resistor set to a resistance value according to an input code, and that outputs, to an output terminal, an output signal; and a high potential side resistor and a low potential side resistor that are connected to the output terminal. The transmitter circuit further includes a high potential side current source that is set with a current value according to the input code, and a low potential side current source that is set with a current value according to the input code. The transmitter circuit further includes a high potential side switch and a low potential side switch that switch between allowing current output from the high voltage side current source and the low voltage side current source to pass, and blocking the current.Type: ApplicationFiled: September 2, 2015Publication date: March 31, 2016Inventors: Shigeaki KAWAI, Nobumasa HASEGAWA
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Patent number: 9300253Abstract: An amplifier includes a first transformer configured to output first differential signals, a first differential amplifier coupled to the first transformer, a second transformer coupled to the first differential amplifier, a second differential amplifier coupled to the second transformer, a third transformer configured to transform second differential signals output from the second differential amplifier to a single-ended output signal, and a first bias circuit configured to supply a first bias voltage to a first secondary coil of the first transformer, wherein the first bias circuit sets the first bias voltage to a voltage greater than or equal to a first voltage based on the input signal in a first operating area where power of the output signal is greater than or equal to a first power so that power-gain characteristics of the output signal become closer to characteristics where gain of the output signal becomes constant.Type: GrantFiled: October 31, 2014Date of Patent: March 29, 2016Assignee: Socionext Inc.Inventor: Nobumasa Hasegawa
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Publication number: 20150130540Abstract: An amplifier includes a first transformer configured to output first differential signals, a first differential amplifier coupled to the first transformer, a second transformer coupled to the first differential amplifier, a second differential amplifier coupled to the second transformer, a third transformer configured to transform second differential signals output from the second differential amplifier to a single-ended output signal, and a first bias circuit configured to supply a first bias voltage to a first secondary coil of the first transformer, wherein the first bias circuit sets the first bias voltage to a voltage greater than or equal to a first voltage based on the input signal in a first operating area where power of the output signal is greater than or equal to a first power so that power-gain characteristics of the output signal become closer to characteristics where gain of the output signal becomes constant.Type: ApplicationFiled: October 31, 2014Publication date: May 14, 2015Inventor: Nobumasa HASEGAWA
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Publication number: 20140131860Abstract: A semiconductor device includes a semiconductor substrate; an active element configured to be formed on the semiconductor substrate; and a multi-layer wiring structure configured to be formed on the semiconductor substrate. A heat dissipation structure is provided in the multi-layer wiring structure. The upper end of the heat dissipation structure forms an external connection pad to be connected with an external wiring board, and the lower end of the heat dissipation structure makes contact with a surface of the semiconductor substrate outside of an element forming region for the active element.Type: ApplicationFiled: November 13, 2013Publication date: May 15, 2014Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Kouichi KANDA, Nobumasa HASEGAWA
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Patent number: 7956682Abstract: An amplifier including a first transistor including a gate coupled to an input terminal and a grounded source; a load resistor provided between a drain of the first transistor and a power supply; an output terminal coupled to a node between the drain of the first transistor and the load resistor; a feedback path coupled to the input terminal and the output terminal and including a resistor and a capacitor; a bias voltage generator applying a gate bias voltage to the gate of the first transistor in response to an enable signal; a supply resistor provided between an output node for the gate bias voltage of the bias voltage generator and the gate of the first transistor; and an enable switch lowering a resistance value between the output node for the gate bias voltage and a node in the feedback path.Type: GrantFiled: February 9, 2010Date of Patent: June 7, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Nobumasa Hasegawa
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Publication number: 20100201449Abstract: An amplifier including a first transistor including a gate coupled to an input terminal and a grounded source; a load resistor provided between a drain of the first transistor and a power supply; an output terminal coupled to a node between the drain of the first transistor and the load resistor; a feedback path coupled to the input terminal and the output terminal and including a resistor and a capacitor; a bias voltage generator applying a gate bias voltage to the gate of the first transistor in response to an enable signal; a supply resistor provided between an output node for the gate bias voltage of the bias voltage generator and the gate of the first transistor; and an enable switch lowering a resistance value between the output node for the gate bias voltage and a node in the feedback path.Type: ApplicationFiled: February 9, 2010Publication date: August 12, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Nobumasa HASEGAWA
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Publication number: 20100182093Abstract: A single-ended to differential converting apparatus includes a first amplifier configured to output a first voltage signal corresponding to a single phase input signal; and a second amplifier configured to output a second voltage signal corresponding to the first voltage signal, where a first load of the first amplifier, an input transistor of the second amplifier, and a second load of the second amplifier have identical mutual conductance.Type: ApplicationFiled: March 30, 2010Publication date: July 22, 2010Applicant: FUJITSU LIMITEDInventor: Nobumasa Hasegawa