Patents by Inventor Nobumasa Ueda

Nobumasa Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050274982
    Abstract: In an electronic unit with a substrate, a control circuit is mounted on the substrate and is configured to execute an operation related to a load. A package encapsulates the control circuit and the substrate. The package has sides around a periphery of the substrate. At least one input terminal for input of a signal externally sent to the electronic unit is disposed on at least one of the plurality of surfaces. At least one output terminal for output of a control signal for controlling the load is disposed on at least another one of the plurality of surfaces. At least one check terminal for input/output of a signal for checking at least the control circuit is disposed on at least another one of the plurality of surfaces.
    Type: Application
    Filed: June 14, 2005
    Publication date: December 15, 2005
    Applicant: DENSO CORPORATION
    Inventors: Nobumasa Ueda, Hirokazu Kasuya, Koji Numazaki, Yutaka Fukuda, Mitsuhiro Saitou
  • Publication number: 20050231925
    Abstract: An electric device includes: a first electric element; a second electric element capable of flowing large current therethrough so that heat is generated in the second electric element; a heat sink; and a first wiring board and a second wiring board, which are disposed on one side of the heat sink. The large current in the second electric element is larger than that in the first electric element. The first wiring board and the second wiring board are separated each other. The first electric element is disposed on the first wiring board, and the second electric element is disposed on the second wiring board.
    Type: Application
    Filed: April 14, 2005
    Publication date: October 20, 2005
    Inventors: Yutaka Fukuda, Mitsuhiro Saitou, Toshihiro Nagaya, Kan Kinouchi, Sadahiro Akama, Koji Numazaki, Norihisa Imaizumi, Hiromasa Hayashi, Akihiro Fukatsu, Hirokazu Kasuya, Nobumasa Ueda
  • Publication number: 20050179463
    Abstract: In order to protect semiconductor switching-devices employed in an H bridge circuit against an over-voltage without using a special protection circuit, a control circuit outputs a control signal to a driving circuit for driving the H bridge circuit in order to turn off FETs serving as the semiconductor switching-devices when an over-voltage detection circuit detects the over-voltage applied to the H bridge circuit.
    Type: Application
    Filed: February 15, 2005
    Publication date: August 18, 2005
    Inventors: Hirokazu Kasuya, Koji Numazaki, Mitsuhiro Saitou, Yutaka Fukuda, Nobumasa Ueda
  • Patent number: 6879029
    Abstract: When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: April 12, 2005
    Assignee: Denso Corporation
    Inventors: Nobumasa Ueda, Shoji Mizuno
  • Publication number: 20030153125
    Abstract: When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating. film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.
    Type: Application
    Filed: January 13, 2003
    Publication date: August 14, 2003
    Inventors: Nobumasa Ueda, Shoji Mizuno
  • Patent number: 6545513
    Abstract: A current control circuit controls a gate potential of a transistor to equalize a load current IL with a trapezoidal wave signal Sb. The trapezoidal wave signal Sb increases at a constant gradient when a drive command signal Sa turns into H level. Due to increase of load current IL, the transistor starts operating in a linear region and a gate voltage VGS abruptly increases. A saturation state detecting circuit turns a current saturation signal Sc into L level when the gate voltage VGS exceeds a reference voltage Vr. A trapezoidal wave generating circuit stops increase of trapezoidal wave signal Sb. When drive command signal Sa turns into L level, the trapezoidal wave signal Sb decreases at a constant gradient. The load current IL decreases according to reduction of trapezoidal wave signal Sb.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: April 8, 2003
    Assignee: Denso Corporation
    Inventors: Masahiro Tsuchida, Nobumasa Ueda, Hiroshi Fujimoto, Yoshiki Koyama
  • Patent number: 6524890
    Abstract: When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: February 25, 2003
    Assignee: Denso Corporation
    Inventors: Nobumasa Ueda, Shoji Mizuno
  • Publication number: 20020185681
    Abstract: A power MOS transistor formed of an array of source cells and drain cells on an IC chip substrate has a plurality of substrate contact cells, each formed external to the source cells, having respective substrate potential-setting electrodes to which an externally supplied substrate bias voltage can be applied, enabling the substrate potential to be set independently of the source potential of the transistor. It thereby becomes possible to modify the threshold voltage of the transistor or maintain a constant potential difference between the substrate potential and that of a gate input signal. Since the requirement for a substrate contact region within each source cell is eliminated, and the number of substrate contact cells can be fewer than that of the source cells, the chip area occupied by the transistor can be reduced by comparison with a prior art configuration providing such a substrate potential control capability.
    Type: Application
    Filed: June 4, 2002
    Publication date: December 12, 2002
    Inventors: Takashi Nakano, Satoshi Shiraki, Yutaka Fukuda, Nobumasa Ueda, Shoji Miura
  • Publication number: 20020171455
    Abstract: A current control circuit controls a gate potential of a transistor to equalize a load current IL with a trapezoidal wave signal Sb. The trapezoidal wave signal Sb increases at a constant gradient when a drive command signal Sa turns into H level. Due to increase of load current IL, the transistor starts operating in a linear region and a gate voltage VGS abruptly increases. A saturation state detecting circuit turns a current saturation signal Sc into L level when the gate voltage VGS exceeds a reference voltage Vr. A trapezoidal wave generating circuit stops increase of trapezoidal wave signal Sb. When drive command signal Sa turns into L level, the trapezoidal wave signal Sb decreases at a constant gradient. The load current IL decreases according to reduction of trapezoidal wave signal Sb.
    Type: Application
    Filed: May 16, 2002
    Publication date: November 21, 2002
    Inventors: Masahiro Tsuchida, Nobumasa Ueda, Hiroshi Fujimoto, Yoshiki Koyama
  • Publication number: 20020031897
    Abstract: When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.
    Type: Application
    Filed: November 16, 2001
    Publication date: March 14, 2002
    Inventors: Nobumasa Ueda, Shoji Mizuno
  • Patent number: 5995891
    Abstract: An automotive occupant restraint system with a simple and compact energy reserve circuit is provided which includes an occupant restraint mechanism, a step-up circuit, a backup capacitor, a crash monitor, a firing circuit, and a switching circuit. The step-up circuit steps up the voltage supplied from a battery to charge the backup capacitor up to a given voltage level. The crash monitor monitors a vehicle crash to provide a crash signal. The firing circuit is responsive to the crash signal to activate the occupant restraint mechanism. The switching circuit selects between a first and a second power supply mode.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: November 30, 1999
    Assignee: Denso Corporation
    Inventors: Nobuo Mayumi, Nobumasa Ueda
  • Patent number: 5977651
    Abstract: A drive circuit for a vehicle occupant safety apparatus includes a device for activating the vehicle occupant safety apparatus. A first transistor is connected in series with the device. A constant-current circuit receives electric energy from a power supply, and feeds a constant current to the device when the first transistor falls into its on state. The constant-current circuit includes a second transistor connected in series with the device. The second transistor includes an N-channel field-effect transistor. A third transistor is connected to the second transistor. The second and third transistors form a current mirror circuit. The third transistor includes an N-channel field-effect transistor. A voltage between a gate and a source of the third transistor is regulated at a constant level. Gate voltages of the second and third transistors are controlled in response to source voltages of the second and third transistors to equalize the source voltages of the second and third transistors.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: November 2, 1999
    Assignee: Denso Corporation
    Inventors: Nobumasa Ueda, Nobuo Mayumi, Mitsuhiro Saitou, Shoichi Okuda
  • Patent number: 5877617
    Abstract: A load current supply circuit having a current sensing function is composed of a current mirror circuit which includes a power transistor circuit and a sense transistor circuit both connected in parallel with each other, and a current detection circuit connected to the sense transistor circuit. Load current is drawn through the power transistor while sensing current which is proportional to the load current and is much less than the load current flows through the sense transistor. The current detection circuit detects the load current based on the sensing current. A current mirror ratio has to be constant under a wide range of ambient temperature in order to secure a current sensing accuracy. To maintain the current mirror ratio at a substantially constant level, a resistance ratio of wiring resistance to transistor ON-resistance in the sense transistor circuit is made substantially equal to that in the power transistor circuit.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: March 2, 1999
    Assignee: Denso Corporation
    Inventor: Nobumasa Ueda