Patents by Inventor Nobuo Fujii

Nobuo Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090102545
    Abstract: An input signal (Vin) is divided into n (?3) number of divided signals which are weighted by first weights (ki). The weighted divided signals are processed by n number of signal processing means 1 to n performing the same signal processing. The processed divided signals are weighted by second weights (li) and added to obtain an output signal (Vout). By selecting the first weights (ki) and the second weights (li), it is possible to eliminate noise or eliminate distortion.
    Type: Application
    Filed: April 25, 2006
    Publication date: April 23, 2009
    Inventors: Shigetaka Takagi, Nobuo Fujii, Takahide Sato, Kazuyuki Wada
  • Patent number: 6664854
    Abstract: When an input signal to be amplified is very small and a large blocking signal having a high frequency is included in an input, it is necessary for a filter for mobile communication for removing thereof that a common-mode signal rejection ratio is large. Further, even in the case of an amplifier having a high gain, it is preferable that the common-mode rejection ratio is large in order to avoid saturation of the amplifier by noise. A common-mode rejecting characteristic is added to an input stage by making transconductance circuits of an input of an integrating circuit proposed by Nauta differential circuits and connecting thereof in cross connection. Thereby, a filter as well as an amplifier improving the common-mode rejection ratio of a total, are realized by being applied to a CMOS process or a BiCMOS process.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: December 16, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Satoshi Tanaka, Shigetaka Takagi, Nobuo Fujii
  • Patent number: 6661289
    Abstract: A voltage-to-current conversion circuit composed of MOSFETs of the same polarity and an OTA with Rail-to-Rail with a simple configuration that uses the same have been disclosed. The voltage-to-current conversion circuit comprises a first MOSFET, to which a fixed drain-source voltage is applied all the time, and which generates a first current signal for an input voltage, a second MOSFET, which has the same polarity as that of the first MOSFET, to which the fixed drain-source voltage is applied all the time, and which generates a second current signal complementary to the first current signal for the input voltage, and a difference current operation circuit that performs the operation of subtraction between the first current signal and the second current signal, thereby an output current is generated in accordance with the input voltage.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: December 9, 2003
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Takahide Sato, Nobuo Fujii, Sigetaka Takagi, Kazuyuki Wada
  • Publication number: 20030071603
    Abstract: A voltage-to-current conversion circuit composed of MOSFETs of the same polarity and an OTA with Rail-to-Rail with a simple configuration that uses the same have been disclosed. The voltage-to-current conversion circuit comprises a first MOSFET, to which a fixed drain-source voltage is applied all the time, and which generates a first current signal for an input voltage, a second MOSFET, which has the same polarity as that of the first MOSFET, to which the fixed drain-source voltage is applied all the time, and which generates a second current signal complementary to the first current signal for the input voltage, and a difference current operation circuit that performs the operation of subtraction between the first current signal and the second current signal, thereby an output current is generated in accordance with the input voltage.
    Type: Application
    Filed: June 21, 2002
    Publication date: April 17, 2003
    Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
    Inventors: Takahide Sato, Nobuo Fujii, Sigetaka Takagi, Kazuyuki Wada
  • Publication number: 20030052738
    Abstract: When an input signal to be amplified is very small and a large blocking signal having a high frequency is included in an input, it is necessary for a filter for mobile communication for removing thereof that a common-mode signal rejection ratio is large. Further, even in the case of an amplifier having a high gain, it is preferable that the common-mode rejection ratio is large in order to avoid saturation of the amplifier by noise. A common-mode rejecting characteristic is added to an input stage by making transconductance circuits of an input of an integrating circuit proposed by Nauta differential circuits and connecting thereof in cross connection. Thereby, a filter as well as an amplifier improving the common-mode rejection ratio of a total, are realized by being applied to a CMOS process or a BiCMOS process.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 20, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Satoshi Tanaka, Shigetaka Takagi, Nobuo Fujii
  • Patent number: 6476676
    Abstract: When an input signal to be amplified is very small and a large blocking signal having a high frequency is included in an input, it is necessary for a filter for mobile communication for removing thereof that a common-mode signal rejection ratio is large. Further, even in the case of an amplifier having a high gain, it is preferable that the common-mode rejection ratio is large in order to avoid saturation of the amplifier by noise. A common-mode rejecting characteristic is added to an input stage by making transconductance circuits of an input of an integrating circuit proposed by Nauta differential circits and connecting thereof in cross connection. Thereby, a filter as well as an amplifier improving the common-mode rejection ratio of a total, are realized by being applied to a CMOS process or a BiCMOS process.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: November 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Satoshi Tanaka, Shigetaka Takagi, Nobuo Fujii
  • Patent number: 6388520
    Abstract: A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier, a load resistor having one end connected to an output terminal of the current output amplifier and a voltage control circuit having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: May 14, 2002
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
  • Publication number: 20010005163
    Abstract: A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier, a load resistor having one end connected to an output terminal of the current output amplifier and a voltage control circuit having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.
    Type: Application
    Filed: December 19, 2000
    Publication date: June 28, 2001
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
  • Patent number: 5578862
    Abstract: By reverse biasing the PN junction formed around a semiconductor element, the semiconductor element is isolated from other elements. The PN junction around the semiconductor element is a junction between a layer surrounding the semiconductor element and a layer disposed outside the layer. Jointly with the layer constituting the semiconductor, the layer surrounding the semiconductor element forms a parasitic diode. The potential of the layer on the semiconductor element to be connected to the layer surrounding the semiconductor element is detected, and based on this potential, the voltage to be applied to the parasitic diode is controlled so as to be constant. When the voltage to be applied to the parasitic diode is lower than a threshold, the parasitic diode will be in a cutoff state.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: November 26, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Fujii, Yosuke Mizukawa, Yasuo Mitsuhashi
  • Patent number: 5351490
    Abstract: A cryogenic refrigerator comprises a compressor including a compressor housing within which a cylinder is mounted, and a piston reciprocal within the cylinder, and a cold finger including a low temperature cylinder within which a displacer is reciprocable, and a regenerater mounted within the displacer. A plurality of flat piston suspension springs include a plurality of spiral slits to provide a plurality of spiral arms deflectable as the piston is reciprocated within the compressor cylinder. A plurality of annular inner retainers are secured to the piston and adapted to sandwich the inner peripheral edges of the piston suspension springs. A plurality of annular outer retainers are secured to the compressor housing and include a plurality of projections extending inwardly from the outer ends of the spiral slits to sandwich the outer peripheral edges of the flat piston suspension springs.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: October 4, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tatsuru Ohishi, Kazuki Niitsu, Hiroyuki Kiyota, Nobuo Fujii, Yoshihiro Katagishi, Takeshi Miyazawa
  • Patent number: 5113662
    Abstract: A refrigerator comprising a first cylinder and a second cylinder which are coaxially arranged, a first movable coil and a second movable coil which are oppositely arranged in a magnetic flux produced by a magnet, and which can be reciprocated by applying an a.c.
    Type: Grant
    Filed: March 5, 1991
    Date of Patent: May 19, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Fujii, Hiroyuki Kiyota, Yoshihiro Katagishi, Takeshi Miyazawa
  • Patent number: 5088288
    Abstract: A refrigerator comprises a compressor including a first cylinder having an inner cylindrical surface, a piston reciprocating in the first cylinder, and a linear motor for having a.c. electric input power applied thereto to drive the piston; a cold finger including a second cylinder having an elongated inner cylindrical surface, a displacer reciprocating in the second cylinder, and a cold space and a hot space which are divided by the displacer; a temperature detector for detecting the temperature in the cold space; an electric input power decision unit for having a detection signal inputted from the temperature detector and for deciding the electric input power to be applied to the linear motor so that the electric input power grows greater and greater as the temperature in the cold space decreases; and a power source for providing the electric input power to the linear motor based on the output from the electric input power decision unit.
    Type: Grant
    Filed: October 9, 1990
    Date of Patent: February 18, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Katagishi, Takeshi Miyazawa, Hiroyuki Kiyota, Nobuo Fujii