Patents by Inventor Nobuo Itoi

Nobuo Itoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7102654
    Abstract: A driving circuit of this invention has a comparator that compares an input signal with a sampling signal to perform a pulse width modulation to the input signal, a driving transistor circuit that switches according to an output signal of the comparator, and a filter that reduces a switching frequency component of the driving transistor circuit. The switching frequency of the driving transistor circuit is a product of multiplication of a horizontal frequency. Also, a PLL circuit that locks the frequency of the sampling signal to the frequency acquired from multiplication of the horizontal frequency is provided. Therefore, when the driving circuit with the PWM method is built in a television set, beat interference can be prevented, avoiding an unpleasant view caused by the raster interference on the television screen.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: September 5, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Nobuo Itoi
  • Publication number: 20030122607
    Abstract: A driving circuit of this invention has a comparator that compares an input signal with a sampling signal to perform a pulse width modulation to the input signal, a driving transistor circuit that switches according to an output signal of the comparator, and a filter that reduces a switching frequency component of the driving transistor circuit. The switching frequency of the driving transistor circuit is a product of multiplication of a horizontal frequency. Also, a PLL circuit that locks the frequency of the sampling signal to the frequency acquired from multiplication of the horizontal frequency is provided. Therefore, when the driving circuit with the PWM method is built in a television set, beat interference can be prevented, avoiding an unpleasant view caused by the raster interference on the television screen.
    Type: Application
    Filed: December 13, 2002
    Publication date: July 3, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Nobuo Itoi
  • Patent number: 6515439
    Abstract: Circuit means absorbing counter-electromotive voltage generated by a vertical deflection yoke coil DY while scanning period is provided in a vertical deflection driving circuit of PWM method. Because a MOS transistor TR4 for pumping-up switching is on while scanning period Tt′, current flows through a channel: a diode D3 connected between source and drain of a MOS transistor TR1 for driving, a capacitor C3 for pumping-up, TR4, and a ground line (GND line) so that counter-electromotive voltage Va of power source side is absorbed. On the other hand, it is possible to detect retracing period Tr′ and to make a pumping-up circuit on by providing the comparators 23 and 24 for pumping-up.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: February 4, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Nobuo Itoi
  • Publication number: 20020105292
    Abstract: Circuit means absorbing counter-electromotive voltage generated by a vertical deflection yoke coil DY while scanning period is provided in a vertical deflection driving circuit of PWM method. Because a MOS transistor TR4 for pumping-up switching is on while scanning period Tt′, current flows through a channel: a diode D3 connected between source and drain of a MOS transistor TR1 for driving, a capacitor C3 for pumping-up, TR4, and a ground line (GND line) so that counter-electromotive voltage Va of power source side is absorbed. On the other hand, it is possible to detect retracing period Tr′ and to make a pumping-up circuit on by providing the comparators 23 and 24 for pumping-up.
    Type: Application
    Filed: December 21, 2001
    Publication date: August 8, 2002
    Inventor: Nobuo Itoi
  • Patent number: 5770930
    Abstract: A vertical deflecting circuit comprises a vertical output circuit (12) which amplifies an input sawtooth wave signal and supplies a deflection current to a vertical deflection coil (13), a power source (14) which applies a source voltage to the vertical output circuit, a first pump-up circuit (17) which raises the voltage from the power source, and a second pump-up circuit (18) which further raises the output voltage from the first pump-up circuit. In a fly-back time of a vertical output signal, the vertical output circuit is operated by the voltage from the second pump-up circuit, and the vertical output circuit is operated by the voltage from the power source during a time coefficient.
    Type: Grant
    Filed: January 30, 1997
    Date of Patent: June 23, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Nobuo Itoi
  • Patent number: 4063816
    Abstract: A chemical reaction velocity measuring apparatus by detecting change in light absorbance.The apparatus includes an optical system containing a means for alternately passing the lights of at least two different wavelengths and a detector;A sample holding means for arranging plural samples at regular spacings;An advancing means for intermittent advancement of said samples in such a manner that a sample and a vacant spacing between samples are alternately positioned at said two colorimetric measuring devices; andA means for detecting the change of light absorbance from the difference of absorbances measured at two wavelengths by said two colorimetric measuring devices.
    Type: Grant
    Filed: December 16, 1975
    Date of Patent: December 20, 1977
    Assignee: Nippon Kogaku K.K.
    Inventors: Nobuo Itoi, Teruo Shimamura, Yoshio Fukami, Hidetoshi Mori, Kenji Miwa