Abstract: An asynchronous correlation circuit includes a first data supply unit that dual-rail-encodes first sequence data and supplies first data to be provided for next calculation at each time when calculation is completed, a second data supply unit that dual-rail-encodes second sequence data and supplies second data to be provided for next calculation at each time when calculation is completed, an addition result storage unit, a third dual-rail encoding unit that dual-rail-encodes a storage value of the addition result storage unit, an asynchronous full addition unit that adds an output value from the first data supply unit to an output value of the third dual-rail encoding unit with a sign in response to an output value from the second data supply unit, and outputs the value, and a dual-rail decoding unit that decodes and outputs an output value of the asynchronous full addition unit to the addition result storage unit.

Abstract: An asynchronous correlation circuit includes a first data supply unit that dual-rail-encodes first sequence data and supplies first data to be provided for next calculation at each time when calculation is completed, a second data supply unit that dual-rail-encodes second sequence data and supplies second data to be provided for next calculation at each time when calculation is completed, an addition result storage unit, a third dual-rail encoding unit that dual-rail-encodes a storage value of the addition result storage unit, an asynchronous full addition unit that adds an output value from the first data supply unit to an output value of the third dual-rail encoding unit with a sign in response to an output value from the second data supply unit, and outputs the value, and a dual-rail decoding unit that decodes and outputs an output value of the asynchronous full addition unit to the addition result storage unit.

Abstract: A time correction circuit includes: a time-measurement device that measures a time period; a receiver device that receives electromagnetic wave based on a first baseband signal, the first baseband signal including time information concerning time and being encoded by a pulse width modulation method, and outputs a second baseband signal based on the electromagnetic wave received; and an asynchronous circuit that corrects the time based on the second baseband signal, wherein the asynchronous circuit executes a specified process to retrieve the time information from the second baseband signal based on the time period measured, at least one of when the second baseband signal changes from high level to low level and when the second baseband signal changes from low level to high level, and assumes a standby state after executing the specified process.

Abstract: A transmitter included in a fixed length serial burst data transmission system in which the transmitter and a receiver are coupled to each other through at least two data signal lines includes a dual-rail encoder encoding fixed length serial transmit data into corresponding symbols, inserting a null symbol delimiting the data symbols, and sending out the symbols via the two data signal lines during transmission, while transmitting an invalid symbol indicating a non-transmission state to the receiver via the two data signal lines during non-transmission.

Abstract: A transmitter for use in a variable-length serial burst data transmission system having the transmitter and a receiver that are connected by at least two data signal lines and a burst start line includes a dual-rail encoder and a burst start signal receiving part. While transmitting variable-length serial data, the dual-rail encoder encodes each bit of the serial data into a corresponding symbol, inserts a null symbol delimiting the data symbols, and sends out the symbols via the two data signal lines to the receiver. For a period of non-transmission state, the transmitter sends out an invalid symbol representing a non-transmission state via the two data signal lines to the receiver. The burst start signal receiving part receives a burst start signal, which indicates a start of burst transmission of the variable-length serial data, via the burst start line from the receiver.

Abstract: Aspects of the invention provide an electronic paper display system that can include an electronic paper and the writing device. The writing device transmits power and baseband signals by using an electromagnetic coupling between a coil of the writing device and a coil of the electronic paper. The baseband signals, which are encoded by the writing device, are decoded by a decoder of the electronic paper and fed to the control circuit to illustrate images on a bi-stable display unit. The electronic paper has a power storage that temporarily stores power transmitted by using electromagnetic coupling for absorbing fluctuation of power in both transmission and consumption. The asynchronous design of this invention brings both robustness and low-power consumption.

Abstract: Aspects of the invention provide an electronic paper display system that can include an electronic paper and the writing device. The writing device transmits power and baseband signals by using an electromagnetic coupling between a coil of the writing device and a coil of the electronic paper. The baseband signals, which are encoded by the writing device, are decoded by a decoder of the electronic paper and fed to the control circuit to illustrate images on a bi-stable display unit. The electronic paper has a power storage that temporarily stores power transmitted by using electromagnetic coupling for absorbing fluctuation of power in both transmission and consumption. The asynchronous design of this invention brings both robustness and low-power consumption.

Abstract: A time correction circuit includes: a time-measurement device that measures a time period; a receiver device that receives electromagnetic wave based on a first baseband signal, the first baseband signal including time information concerning time and being encoded by a pulse width modulation method, and outputs a second baseband signal based on the electromagnetic wave received; and an asynchronous circuit that corrects the time based on the second baseband signal, wherein the asynchronous circuit executes a specified process to retrieve the time information from the second baseband signal based on the time period measured, at least one of when the second baseband signal changes from high level to low level and when the second baseband signal changes from low level to high level, and assumes a standby state after executing the specified process.

Abstract: An asynchronous serial communication method and the apparatus including a sender transmitting a one bit of serial data by firstly making a signal transition on the data line, secondly putting the one bit of serial data on the data line after a predetermined time T1 yet before another predetermined time T1+T2, and a receiver receiving the one bit of serial data by firstly detecting the signal transition on the data line and secondly capturing the one bit of serial data after a predetermined time T3 (where T3>T1+T2).

Abstract: An electro-optical device that facilitates assembly of the electro-optical device composed of a plurality of display tiles on a wall surface, and its assembly method are provided. It includes a plurality of display tiles, and a foundation structure having a plurality of regions, wherein the foundation structure is equipped with a signal bus for transmitting an image data signal to a first display tile among the plurality of display tiles, and a first connection section that electrically connects the signal bus with the first display tile, and the first display tile is equipped with pixel elements, a signal processing section that generates signals for driving the pixel elements based on the image data signal, and a second connection section that is electrically connected to the first connection section.

Abstract: An arithmetic unit of arbitrary-precision, including: a main processing unit, which splits up the first and the second arbitrary-precision values into N-bit (where N is a natural number) operands respectively in the-least-significant-bit-first order for computing with the arbitrary-precision data and consecutively outputting a series of pairs of the first and second N-bit operands; and an N-bit arithmetic unit, which performs computing with the N-bit operands, while requesting the main processing unit to feed the next N-bit operands each time the computation completes. The carry bit generated by the operation is fed to the next N-bit operation.

Abstract: Aspects of the invention provide an electronic paper display system that can include an electronic paper and the writing device. The writing device transmits power and baseband signals by using an electromagnetic coupling between a coil of the writing device and a coil of the electronic paper. The baseband signals, which are encoded by the writing device, are decoded by a decoder of the electronic paper and fed to the control circuit to illustrate images on a bi-stable display unit. The electronic paper has a power storage that temporarily stores power transmitted by using electromagnetic coupling for absorbing fluctuation of power in both transmission and consumption. The asynchronous design of this invention brings both robustness and low-power consumption.

Abstract: A printing device, including: a mechanical energy storage mechanism for storing mechanical energy; and a mechanical energy application mechanism for carrying a sheet and/or printing on the sheet, using the mechanical energy stored.

Abstract: It is an object of the present invention to propose a sheet computer that eliminates the drawback in operational speed caused by clock delays of a system clock and that is capable of high speed operation. In order to achieve this object, in the sheet computer of the present invention, a display circuit and peripheral circuits connected to the display circuit are fabricated on the same substratum and the peripheral circuits constitute an asynchronous system without global clocking. In the asynchronous system, processes constituting minimum function circuits perform mutual handshaking by channels and drive events actively or passively. The asynchronous system does not use global clocking and it is therefore possible to implement lower power consumption and a higher operational speed.

Abstract: An asynchronous adder permits asynchronous design in which dual-rail encoding is employed, not only for a control part but also for a datapath part including an ALU. An asynchronous adder of an exemplary embodiment includes a combinational circuit to perform full addition with, as an input value, an addend X, an augend Y and a carry-in Cin that are dual-rail encoded, and to output a sum output Z and a carry output Cout that are dual-rail encoded as an output value.

Abstract: What exemplifies the invention is an electro-optical device that includes a matrix of pixel elements, a matrix of pixel drivers, each of which corresponds to each of the pixel elements, and a matrix of element processors, each of which corresponds to each of the pixel drivers. The element processors collaborate in executing grayscale calculation for transforming the grayscale resolution of the pixel data into another grayscale resolution, which is intrinsic in the couple of the pixel element and the driver, with reference to error distributed from the adjacent element processors in order to supply the result of calculation to the corresponding pixel driver, and also in distributing the error of grayscale calculation to the adjacent pixel elements.

Abstract: A detecting device includes: multiple sensors composed with a plurality of sensor circuits arrayed on a plane, each of which generates at least one detected signal that corresponds to a distance from a surface of an object; a selector circuit which selects each of the sensor circuits and outputs the detected signal from each of the sensor circuits; a storage which stores digital data of a reference value; a digital-to-analog converter circuit which generates a reference signal that corresponds to a level of the reference value from the digital data stored in the storage; a generation circuit which generates, per each of the sensor circuits, in sequence, detected data according to a relationship of levels between the detected signal output from each of the sensor circuits selected by the selector circuit, and the reference signal generated by the digital-to-analog converter circuit; an arithmetic circuit which conducts a prescribed operation with a plurality of detected data sets generated by the generation ci

Abstract: A transmitter for use in a variable-length serial burst data transfer system having the transmitter and a receiver that are connected by at least two data transmission lines and a burst start line includes a two-line encoder and a burst start signal receiving portion. During transmitting variable-length serial transmit data made up of binary digits, the two-line encoder encodes the transmit data into transmit data symbols that are each associated with each piece of transmit data in advance, inserts an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmits the encoded transmit data via the two data transmission lines to the receiver. During non-transmit, the two-line encoder transmits a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.

Abstract: A transmitter included in a fixed length serial burst data transfer system in which the transmitter and a receiver are coupled to each other through at least two data transmission lines includes a two wire encoder encoding fixed length serial transmit data having binary digits to transmit data symbols each predetermined to correspond to each piece of the transmit data, inserting an identification symbol between the encoded transmit data symbols so as to be encoded to identify the transmit data symbols one from another, and transmitting the encoded transmit data to the receiver through the two data transmission lines during transmission, while transmitting a non-transmission symbol indicating a non-transmission state to the receiver through the two data transmission lines during non-transmission.

Abstract: It is the object of the present invention to provide asynchronous circuit design tools for those engineers who are versed in standard hardware description languages (HDLs), which is widely used in industry mainly for synchronous circuit design, to design asynchronous circuits with relative ease. To accomplish the object, the asynchronous circuit design tools of the present invention include a translator for transforming a code written in an asynchronous circuit design language, which is based on a standard HDL and includes minimal primitives for describing the communications between asynchronous circuit blocks or processes, into a code written in a standard HDL, which is originally developed for synchronous circuit design. The codes transformed into the standard HDL can be functionally verified by using commercially available simulators, which are originally developed for verifying synchronous circuit design.