Patents by Inventor Nobuo Konami

Nobuo Konami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 8037384
    Abstract: A semiconductor device includes a test target circuit; scan chains that enable scanning of the test target circuit; a first random number generation circuit that forms test patterns supplied to the scan chains; a second random number generation circuit that is provided separately from the first random number generation circuit; and a random number control circuit that uses the random numbers generated by the second random number generation circuit to change the random numbers generated by the first random number generation circuit. In a test of the semiconductor device, since a period of a clock of a scan chain does not need to be longer than that of a clock of a pattern generator, the number of clocks of the pattern generator needed for a test can be prevented from increasing. Accordingly, a test time can be prevented from increasing.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 11, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takumi Hasegawa, Motoyuki Sato, Tomoji Nakamura, Nobuo Konami, Jun Matsushima
  • SEMICONDUCTOR DEVICE
    Publication number: 20090172488
    Abstract: A semiconductor device includes a test target circuit; scan chains that enable scanning of the test target circuit; a first random number generation circuit that forms test patterns supplied to the scan chains; a second random number generation circuit that is provided separately from the first random number generation circuit; and a random number control circuit that uses the random numbers generated by the second random number generation circuit to change the random numbers generated by the first random number generation circuit. In a test of the semiconductor device, since a period of a clock of a scan chain does not need to be longer than that of a clock of a pattern generator, the number of clocks of the pattern generator needed for a test can be prevented from increasing. Accordingly, a test time can be prevented from increasing.
    Type: Application
    Filed: December 19, 2008
    Publication date: July 2, 2009
    Inventors: Takumi Hasegawa, Motoyuki Sato, Tomoji Nakamura, Nobuo Konami, Jun Matsushima