Patents by Inventor Nobuo Sashida

Nobuo Sashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9860010
    Abstract: A transmission device includes: a calculation unit to detect abnormal traffic based on a traffic volume collected for the route and to calculate a traffic increase/decrease time and a traffic increase/decrease volume of the abnormal traffic; a normal prediction graph generation unit to generate a normal prediction graph based on the traffic volume in normal time in which the abnormal traffic is not detected; a prediction graph generation unit to generate an abnormal prediction graph based on the traffic increase/decrease time and the traffic increase/decrease volume of the abnormal traffic in detection of the abnormal traffic; an order determination unit to determine a line order that is a priority order of line allocation for the route based on the normal prediction graph or the abnormal prediction graph; and an optimization unit to determine lines that are to be allocated to the route based on the line order.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: January 2, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Danasiri Wijedasa Dewagamage, Tatsuya Shoho, Toshihiro Furudate, Nobuo Sashida
  • Patent number: 9032257
    Abstract: A first interface board includes a first signal processing unit that performs a predetermined process on a signal. A second interface board includes a second signal processing unit that performs the predetermined process on a signal. When no failure occurs in both interface boards, a switching control unit selects the first interface board. When a failure occurs in the first interface board, the switching control unit selects the second interface board. When there is no failure in both the interface boards and the first interface board does not satisfy a predetermined degradation condition, the electrical power supply control unit supplies electrical power to the first interface board and prohibits the supply of electrical power to the second interface board. When there is no failure in both the interface boards but the predetermined degradation condition is satisfied, the electrical power supply control unit supplies electrical power to both the interface boards.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: May 12, 2015
    Assignee: Fujitsu Limited
    Inventors: Nobuo Sashida, Kazushige Saito, Kazuhiko Hata
  • Publication number: 20140289397
    Abstract: A transmission device includes: a calculation unit to detect abnormal traffic based on a traffic volume collected for the route and to calculate a traffic increase/decrease time and a traffic increase/decrease volume of the abnormal traffic; a normal prediction graph generation unit to generate a normal prediction graph based on the traffic volume in normal time in which the abnormal traffic is not detected; a prediction graph generation unit to generate an abnormal prediction graph based on the traffic increase/decrease time and the traffic increase/decrease volume of the abnormal traffic in detection of the abnormal traffic; an order determination unit to determine a line order that is a priority order of line allocation for the route based on the normal prediction graph or the abnormal prediction graph; and an optimization unit to determine lines that are to be allocated to the route based on the line order.
    Type: Application
    Filed: December 30, 2013
    Publication date: September 25, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Danasiri Wijedasa Dewagamage, Tatsuya Shoho, Toshihiro Furudate, Nobuo Sashida
  • Publication number: 20140136879
    Abstract: A first interface board includes a first signal processing unit that performs a predetermined process on a signal. A second interface board includes a second signal processing unit that performs the predetermined process on a signal. When no failure occurs in both interface boards, a switching control unit selects the first interface board. When a failure occurs in the first interface board, the switching control unit selects the second interface board. When there is no failure in both the interface boards and the first interface board does not satisfy a predetermined degradation condition, the electrical power supply control unit supplies electrical power to the first interface board and prohibits the supply of electrical power to the second interface board. When there is no failure in both the interface boards but the predetermined degradation condition is satisfied, the electrical power supply control unit supplies electrical power to both the interface boards.
    Type: Application
    Filed: November 14, 2012
    Publication date: May 15, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Nobuo SASHIDA, Kazushige SAITO, Kazuhiko HATA
  • Publication number: 20030200309
    Abstract: Such problems as that a serious alarm occurring on a network can be recognized in real time by a limited number of maintenance staff, and that the information related to a package housing change cannot be known by a maintenance staff actually operating in front of a transmission apparatus are avoided in a transmission network system, which includes a plurality of transmission apparatus connected to a network; and a supervision and control operation system connected to the network, the supervision and control operation system including a means for transmitting information related to a network alarm or a package housing change, which is detected by the transmission apparatus to a predetermined mail address via an electronic mail.
    Type: Application
    Filed: January 16, 2003
    Publication date: October 23, 2003
    Inventors: Hiroyuki Ohhashi, Eiji Ishizaka, Tatsuo Yamaguchi, Nobuo Sashida
  • Patent number: 5422518
    Abstract: A power supply system of a high reliability and stability capable of suppressing a cross current flow by establishing rapidly synchronism between a power converter and an AC power source in a parallel operation for changing over the power supply sources. The power supply system comprises a current sensor for detecting an AC current supplied from a power converter, a comparator for making decision as to whether the AC current exceeds a predetermined value, and a regulation input means for fetching an active component of the AC power supplied from the power converter in response to an output signal of the comparator, wherein when the AC current exceeds a predetermined value, an output frequency of the power converter is speedily regulated so as to coincide with an output frequency of the AC power source in accordance with a drooping characteristic of the active component of the AC power, while in an isolated operation of the power converter, the output frequency is set at a predetermined value.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: June 6, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Nobuo Sashida
  • Patent number: 5274538
    Abstract: A power conversion apparatus comprises an inverter circuit for converting DC power into AC power which has a first frequency; a transformer connected to the inverter circuit. A cyclo converter circuit having a bidirectional switch controls a direction in which an electric current passes and converts the output from the transformer into AC power which has a second frequency. A switching signal generating circuit generates a switching signal for controlling the polarity of the bidirectional switch of the cyclo converter circuit in such a manner that the output voltage from the inverter circuit does not encounter a short circuit.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: December 28, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Sashida, Kazunori Sanada
  • Patent number: 5257180
    Abstract: Disclosed is a parallel power supply system including AC output inverters for controlling instantaneous values of output voltages by causing arms of respective inverters of the AC output inverters to effect switching in respective phases of the output voltages plural times during one cycle. A bus for connecting outputs on the inverters to a load so that a load current is shared by the inverters. A synchronous circuit for synchronizing the respective inverters by outputting common synchronous signals to the inverters. A detection circuit for detecting a cross current component of an electric current flowing between the respective inverters, and a control circuit for controlling the output voltages of the inverters to restrain the cross current component detected by the detection circuit.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: October 26, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Sashida, Yushin Yamamoto
  • Patent number: 5198970
    Abstract: An a.c. power supply apparatus, such as an uninterruptible power supply apparatus or a fuel cell power generation apparatus, has first, second and third converting devices connected in star configuration with a common bus, whereby the number of power converting devices is reduced and a compact, light weight and efficient power supply apparatus is realized.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: March 30, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takao Kawabata, Nobuo Sashida
  • Patent number: 5189603
    Abstract: A DC-to-AC electric power converting apparatus including an invertor circuit having a plurality of switching elements, a transformer connected to the invertor circuit, and a cyclo-converter circuit for converting the frequency of the output from the transformer. A carrier signal generator is provided for generating a carrier signal of a predetermined frequency.
    Type: Grant
    Filed: September 9, 1991
    Date of Patent: February 23, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Sashida, Kazunori Sanada, Masato Koyama
  • Patent number: 5182463
    Abstract: A 3-phase converter apparatus, in which a 3-phase A.C. power supply and a 3-phase converter operate in parallel on a common load BUS so as to share the load power, has an output voltage command generating device for generating an instantaneous command of the output voltage from the converter, and instantaneous voltage control device for controlling the converter so as to reduce the deviation of the instantaneous value of the output voltage of the converter from the instantaneous command generated by the output voltage command generating device. The converter includes at least one semiconductor switch for effecting a plurality of switching cycles in a half cycle of the A.C. power, so that the control of the phase of the output voltage of the converter with respect to the A.C. power supply is started at any moment.
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: January 26, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yuushin Yamamoto, Nobuo Sashida, Yuuko Yamasaki, Takao Kawabata
  • Patent number: 4985819
    Abstract: An inverter apparatus having a reactor which suppresses ripple components contained in a charging current for a battery and is saturated when a current having a value larger than a predetermined value flows therethrough to have a very small inductance and allowing a small size and a low cost thereof to be designed.
    Type: Grant
    Filed: October 18, 1989
    Date of Patent: January 15, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Haruyoshi Mori, Nobuo Sashida
  • Patent number: 4803611
    Abstract: Apparatus for correcting a DC component of an output voltage in an inverter, where correction is performed so that DC component contained in AC output voltage of an inverter main circuit is reduced. The apparatus is provided with a current detecting circuit constituted by, for example, a saturable reactor installed within an inverter control circuit to control operation of switching elements constituting the inverter main circuit and connected in parallel to the output terminal side of the inverter main circuit for detecting the current of the AC output of the inverter, and a polarity discrimination circuit for automatically discriminating both positive and negative polarities in the current at the output side of the inverter main circuit detected by the current detecting circuit and for generating a DC component correcting signal in the inverter control circuit.
    Type: Grant
    Filed: October 14, 1987
    Date of Patent: February 7, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuo Sashida, Yushin Yamamoto
  • Patent number: 4686447
    Abstract: A static var compensator connected to a line node in a power transmission system and having a capacitor and a first reactor for producing and absorbing reactive power, respectively, and a second reactor connected between the line node and the common node of the first reactor and the capacitor for providing, in combination with the capacitor and the first reactor, a maximum leading reactive capacity so as to effectively reduce the capacities of the elements and for compensating for changes in reactive power resulting from a current fluctuation in response to a load fluctuation. The second reactor increases the reactive power produced by the capacitor when the reactive power absorbed by the first reactor is low and decreases the reactive power produced by the capacitor when the reactive power absorbed by the first reactor is high.
    Type: Grant
    Filed: October 4, 1985
    Date of Patent: August 11, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masatoshi Takeda, Nobuo Sashida
  • Patent number: 4536816
    Abstract: A thyristor apparatus employing light-triggered thyristors comprises forward voltage detecting circuits (15) and a thyristor number detecting circuit (17). The forward voltage detecting circuits (15) detect forward voltages applied to light-triggered thyristors (13) to provide detected signals. The thyristor number detecting circuit (17) is responsive to the detected signals to cause light-triggered thyristors in a thyristor arm (U) to be turned on simultaneously in the case where the number of the light-triggered thyristors being supplied with forward voltages is one or more but not more than a predetermined number. Accordingly, if and when an overvoltage is applied to the thyristor arm (U), overvoltage suppressing elements (14) are prevented from being damaged even if partial commutation failure occurs in the light-triggered thyristors.
    Type: Grant
    Filed: May 24, 1983
    Date of Patent: August 20, 1985
    Assignees: Susumu Jatsumura, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Susumu Matsumura, Masao Yano, Nobuo Sashida, Yoshihiko Yamamoto
  • Patent number: 4475046
    Abstract: An ignition equipment for light ignition thyristors for igniting a plurality of light ignition thyristors being connected in series with each other, which comprises an ignition circuit for generating a thyristor ignition electrical signal, a photoelectric conversion circuit receiving the thyristor ignition electrical signal to convert the same into a thyristor ignition light signal, a reverse voltage detecting means for detecting reverse voltage applied between an anode and cathode of each of the respective thyristors to transmit a reverse voltage detection signal, light guides for guiding the thyristor ignition light signal transmitted from the photoelectric conversion circuit to the thyristors, respectively, and light switches each inserted on the midway of each of the light guides and each interrupting the thyristor ignition light signal so as not to put the same into each of the thyristors while the reverse voltage is applied to each of the thyristors.
    Type: Grant
    Filed: June 1, 1982
    Date of Patent: October 2, 1984
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Koji Nishida, Nobuo Sashida