Abstract: A semiconductor device is provided with: a semiconductor substrate; an insulation film formed above the semiconductor substrate; a pad formed on the insulation film, the pad including a trace; a first passivation film formed on the insulation film, located adjacent the pad, and separated from the pad; and a second passivation film formed on the first passivation film and the pad, the second passivation film covering the trace, and the second passivation film including an opening which exposes a part of the pad.

Abstract: After a plurality of pads (2) are formed on an insulation film (1), a passivation film (3) is formed on the entire surface thereof, and opening parts (3a) which exposes all the pads (2) are formed in the passivation film (3). Next, another passivation film is formed on the entire surface and, for each of the pads (2), an opening part is formed in this passivation film to expose the central portion of the pad (2). According to the above method, the probing test can be performed with the opening parts (3a) formed in the passivation film (3). Performing the probing test in such a state increases the probability that the probe contacts the pad (2) since the entire surface of the pad (2) is exposed, thereby providing the test with a higher accuracy. Thus, the pad can be miniaturized and/or the pitch can be narrowed without requiring a higher accuracy of the probe.

Abstract: A semiconductor device is provided with: a semiconductor substrate; an insulation film formed above the semiconductor substrate; a pad formed on the insulation film, the pad including a trace; a first passivation film formed on the insulation film, located adjacent the pad, and separated from the pad; and a second passivation film formed on the first passivation film and the pad, the second passivation film covering the trace, and the second passivation film including an opening which exposes a part of the pad.

Abstract: After a plurality of pads (2) are formed on an insulation film (1), a passivation film (3) is formed on the entire surface thereof, and opening parts (3a) which exposes all the pads (2) are formed in the passivation film (3). Next, another passivation film is formed on the entire surface and, for each of the pads (2), an opening part is formed in this passivation film to expose the central portion of the pad (2). According to the above method, the probing test can be performed with the opening parts (3a) formed in the passivation film (3). Performing the probing test in such a state increases the probability that the probe contacts the pad (2) since the entire surface of the pad (2) is exposed, thereby providing the test with a higher accuracy. Thus, the pad can be miniaturized and/or the pitch can be narrowed without requiring a higher accuracy of the probe.

Abstract: After a plurality of pads (2) are formed on an insulation film (1), a passivation film (3) is formed on the entire surface thereof, and opening parts (3a) which exposes all the pads (2) are formed in the passivation film (3). Next, another passivation film is formed on the entire surface and, for each of the pads (2), an opening part is formed in this passivation film to expose the central portion of the pad (2). According to the above method, the probing test can be performed with the opening parts (3a) formed in the passivation film (3). Performing the probing test in such a state increases the probability that the probe contacts the pad (2) since the entire surface of the pad (2) is exposed, thereby providing the test with a higher accuracy. Thus, the pad can be miniaturized and/or the pitch can be narrowed without requiring a higher accuracy of the probe.

Abstract: A semiconductor device fabrication method comprises; a first step S1 of fabricating a plurality of semiconductor chips on a plurality of semiconductor wafers, respectively; a second step S4 of making a probe test on the plural semiconductor chips respectively, which are present in a sampling region of one semiconductor wafer of the plural semiconductor wafers; and the third step S5 of computing a yield of the plural semiconductor chips present in the sampling region, when the yields of the plural semiconductor chips computed in the third step are a reference value or above, the probe test is not made on the plural semiconductor chips, which are present outside the sampling region of said one semiconductor wafer and on the rest semiconductor wafers of the plural semiconductor wafers fabricated in the same lot as said one semiconductor wafer.

Abstract: A semiconductor device fabrication method comprises; a first step S1 of fabricating a plurality of semiconductor chips on a plurality of semiconductor wafers, respectively; a second step S4 of making a probe test on the plural semiconductor chips respectively, which are present in a sampling region of one semiconductor wafer of the plural semiconductor wafers; and the third step S5 of computing a yield of the plural semiconductor chips present in the sampling region, when the yields of the plural semiconductor chips computed in the third step are a reference value or above, the probe test is not made on the plural semiconductor chips, which are present outside the sampling region of said one semiconductor wafer and on the rest semiconductor wafers of the plural semiconductor wafers fabricated in the same lot as said one semiconductor wafer.

Abstract: After a plurality of pads (2) are formed on an insulation film (1), a passivation film (3) is formed on the entire surface thereof, and opening parts (3a) which exposes all the pads (2) are formed in the passivation film (3). Next, another passivation film is formed on the entire surface and, for each of the pads (2), an opening part is formed in this passivation film to expose the central portion of the pad (2). According to the above method, the probing test can be performed with the opening parts (3a) formed in the passivation film (3). Performing the probing test in such a state increases the probability that the probe contacts the pad (2) since the entire surface of the pad (2) is exposed, thereby providing the test with a higher accuracy. Thus, the pad can be miniaturized and/or the pitch can be narrowed without requiring a higher accuracy of the probe.