Patents by Inventor Nobuo Uchida

Nobuo Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220111305
    Abstract: A gas purifying apparatus has: a compressing unit for compressing a gas in which an atmosphere or inert gas and a substance vaporized by heating have been mixed; and an expanding unit for liquefying the substance by expanding the gas compressed by the compressing unit, wherein the gas in which the substance has been reduced is obtained
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Applicant: TAMURA CORPORATION
    Inventors: Shoichi SAITO, Hisashi KIMOTO, Nobuo UCHIDA, Atsushi SHIDA
  • Patent number: 11266925
    Abstract: A gas purifying apparatus has: a compressing unit for corn pressing a gas in which an atmosphere or inert gas and a substance vaporized by heating have been mixed; and an expanding unit for liquefying the substance by expanding the gas compressed by the compressing unit, wherein the gas in which the substance has been reduced is obtained.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: March 8, 2022
    Assignee: TAMURA CORPORATION
    Inventors: Shoichi Saito, Hisashi Kimoto, Nobuo Uchida, Atsushi Shida
  • Publication number: 20190234342
    Abstract: A gas purifying apparatus has: a compressing unit for corn pressing a gas in which an atmosphere or inert gas and a substance vaporized by heating have been mixed; and an expanding unit for liquefying the substance by expanding the gas compressed by the compressing unit, wherein the gas in which the substance has been reduced is obtained
    Type: Application
    Filed: January 28, 2019
    Publication date: August 1, 2019
    Applicant: TAMURA CORPORATION
    Inventors: Shoichi SAITO, Hisashi KIMOTO, Nobuo UCHIDA, Atsushi SHIDA
  • Patent number: 7486754
    Abstract: To provide a system clock distributing apparatus and a system clock distributing method for reducing a skew of a system clock and a synchronizing signal at low cost. The system clock distributing apparatus for matching the timing of data by using the synchronizing signal includes an oscillator 1 that generates a periodical synchronizing signal and a PLL 2, a memory that stores the data, at least one CPU 13 that conducts a computing process using the data stored in the memory, at least one MAC 14 that controls an access from the CPU 13 to the memory, and at least one NB 12 that generates the system clock having a frequency that is an integral multiple of the synchronizing signal, and controls the CPU 13 and the MAC 14 based on the operation by the system clock.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: February 3, 2009
    Assignee: Fujitsu Limited
    Inventor: Nobuo Uchida
  • Publication number: 20060153325
    Abstract: To provide a system clock distributing apparatus and a system clock distributing method for reducing a skew of a system clock and a synchronizing signal at low cost. The system clock distributing apparatus for matching the timing of data by using the synchronizing signal includes an oscillator 1 that generates a periodical synchronizing signal and a PLL 2, a memory that stores the data, at least one CPU 13 that conducts a computing process using the data stored in the memory, at least one MAC 14 that controls an access from the CPU 13 to the memory, and at least one NB 12 that generates the system clock having a frequency that is an integral multiple of the synchronizing signal, and controls the CPU 13 and the MAC 14 based on the operation by the system clock.
    Type: Application
    Filed: April 28, 2005
    Publication date: July 13, 2006
    Applicant: Fujitsu Limited
    Inventor: Nobuo Uchida
  • Patent number: 5509136
    Abstract: A data processing system including a small throughput access source and a large throughput access source therein for accessing a main storage unit in a consecutive block access mode. The system further includes a detecting unit and a selecting unit. The detecting unit detects an access conflict expected to occur at the same address of the main storage unit. The selecting unit responds to the detection by the detecting unit and momentarily stops the access by the small throughput access source to give priority to the large throughput access source for accessing the conflicting address of the main storage unit.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: April 16, 1996
    Assignee: Fujitsu Limited
    Inventors: Kenji Korekata, Nobuo Uchida
  • Patent number: 5214769
    Abstract: A multiprocessor control system which has at least one main storage unit, a plurality of main storage control units, a plurality of processing units, and a control bus. Each processing unit is connected to the main storage unit through one of the main storage control units. When each processing unit transmits a request for access to at least one main storage unit, the processing units transmit the request to the main storage control units to which each processing unit is connected, and simultaneously, to all of the other main storage control units, through the control bus. All of the main storage control units process the request from the processing unit, synchronously, and execute a busy check control or the like. Data transmitted between each processing unit and an arbitrary one of the main storage units is transmitted only through the main storage control unit to which the processing unit is connected.
    Type: Grant
    Filed: September 17, 1991
    Date of Patent: May 25, 1993
    Assignee: Fujitsu Limited
    Inventors: Nobuo Uchida, Yasuhiro Kuroda, Shoji Nakatani
  • Patent number: 5073871
    Abstract: An access priority control system for a main storage for a computer, for controlling a signal transmission to the main storage upon receiving a plurality of storage access requests from at least one processor related to the main storage. The system includes a first access request port unit for holding at least temporarily a segment address of the storage access requests from the processor; a first control unit responsive to the output of the first access request port unit for checking bus conflict conditions and prohibition conditions for a destination storage segment determined by the address of the storage access request; a second access request port unit responsive to the output of the first control unit for holding at least temporarily an intra-segment address of the storage access request; and a second control unit responsive to the output of the second access request port unit for checking logical storage busy conditions in the storage segments.
    Type: Grant
    Filed: September 19, 1988
    Date of Patent: December 17, 1991
    Assignee: Fujitsu Limited
    Inventors: Nobuo Uchida, Yuji Oinaga, Mikio Itoh
  • Patent number: 4734131
    Abstract: A permanent-magnet material having a composition represented by the following formula;R(Co.sub.1-X-Y-.alpha.-.beta. Fe.sub.X Cu.sub.Y M.sub..alpha. M'.sub.62)A(wherein X, Y, .alpha., .beta., and A respectively represent the following numbers:0.01.ltoreq.X, 0.02.ltoreq.Y.ltoreq.0.25, 0.001.ltoreq..alpha..ltoreq.0.15,0.0001.ltoreq..beta..ltoreq.0.001, and 6.0.ltoreq.A.ltoreq.8.3,providing that the amount of Fe to be added should be less than 15% by weight, based on the total amount of the composition, and R, M, and M' respectively represent the following constituents:R: At least one element selected from the group of rare earth elements,M: At least one element selected from the group consisting of Ti, Zr, Hf, Nb, V, and Ta, andM': B or B+Si),is disclosed.
    Type: Grant
    Filed: July 21, 1987
    Date of Patent: March 29, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomohisa Arai, Naoyuki Sori, Seiki Sato, Nobuo Uchida