Patents by Inventor Noburo Hosokawa

Noburo Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622403
    Abstract: A method of manufacturing a semiconductor device includes a first process in which a first wiring 3 is provided on a first surface 2a of a semiconductor substrate 2; a second process in which a light transmitting substrate 5 is attached to the first surface 2a; a third process in which the semiconductor substrate 2 is thinned so that the thickness of the semiconductor substrate 2 is smaller than the thickness of the light transmitting substrate 5; a fourth process in which a through hole 7 is formed in the semiconductor substrate 2; a fifth process in which a dip coating method is performed using a first resin material and thus a resin insulating layer 10 is provided; a sixth process in which a contact hole 16 is formed in the resin insulating layer 10; and a seventh process in which a second wiring 8 is provided on a surface 10b of the resin insulating layer 10, and the first wiring 3 and the second wiring 8 are electrically connected via a contact hole 16.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: April 14, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo Hosokawa, Nao Inoue, Katsumi Shibayama
  • Patent number: 10615220
    Abstract: A semiconductor device includes a semiconductor substrate in which a through hole is formed, a first wiring that is provided on a first surface of the semiconductor substrate, an insulating layer provided on an inner surface of the through hole and a second surface of the semiconductor substrate, and a second wiring that is provided on a surface of the insulating layer and electrically connected to the first wiring in an opening. The surface of the insulating layer includes a first region, a second region, a third region, a fourth region that is curved to continuously connect the first and the second regions, and a fifth region that is curved to continuously connect the second and the third regions. An average inclination angle of the second region is smaller than that of the first region and is smaller than that of the inner surface.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 7, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo Hosokawa, Nao Inoue, Katsumi Shibayama
  • Publication number: 20200049974
    Abstract: A light module includes an optical element and a base on which the optical element is mounted. The optical element has an optical portion which has an optical surface; an elastic portion which is provided around the optical portion such that an annular region is formed; and a pair of support portions which is provided such that the optical portion is sandwiched in a first direction along the optical surface and in which an elastic force is applied and a distance therebetween is able to be changed in accordance with elastic deformation of the elastic portion. The base has a main surface, and a mounting region in which an opening communicating with the main surface is provided. The support portions are inserted into the opening in a state where an elastic force of the elastic portion is applied.
    Type: Application
    Filed: March 14, 2018
    Publication date: February 13, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Tatsuya SUGIMOTO, Kyosuke KOTANI, Tomofumi SUZUKI, Katsumi SHIBAYAMA, Noburo HOSOKAWA, Nao INOUE, Masashi ITO, Yutaka KURAMOTO
  • Publication number: 20190371849
    Abstract: A photodetecting device includes a semiconductor substrate, a plurality of avalanche photodiodes each including a light receiving region disposed at a first principal surface side of the semiconductor substrate, the avalanche photodiodes being arranged two-dimensionally at the semiconductor substrate, and a through-electrode electrically connected to a corresponding light receiving region. The through-electrode is provided in a through-hole penetrating through the semiconductor substrate in an area where the plurality of avalanche photodiodes are arranged two-dimensionally. At the first principal surface side of the semiconductor substrate, a groove surrounding the through-hole is formed between the through-hole and the light receiving region adjacent to the through-hole.
    Type: Application
    Filed: July 26, 2017
    Publication date: December 5, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi ISHIDA, Noburo HOSOKAWA, Terumasa NAGANO, Takashi BABA
  • Publication number: 20190341420
    Abstract: A method of manufacturing a semiconductor device includes a first process in which a first wiring 3 is provided on a first surface 2a of a semiconductor substrate 2; a second process in which a light transmitting substrate 5 is attached to the first surface 2a; a third process in which the semiconductor substrate 2 is thinned so that the thickness of the semiconductor substrate 2 is smaller than the thickness of the light transmitting substrate 5; a fourth process in which a through hole 7 is formed in the semiconductor substrate 2; a fifth process in which a dip coating method is performed using a first resin material and thus a resin insulating layer 10 is provided; a sixth process in which a contact hole 16 is formed in the resin insulating layer 10; and a seventh process in which a second wiring 8 is provided on a surface 10b of the resin insulating layer 10, and the first wiring 3 and the second wiring 8 are electrically connected via a contact hole 16.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo HOSOKAWA, Nao INOUE, Katsumi SHIBAYAMA
  • Patent number: 10461115
    Abstract: A photodiode array includes a plurality of photodiodes formed in a semiconductor substrate. Each of the photodiodes includes a first semiconductor region of a first conductivity type, and provided in the semiconductor substrate, a second semiconductor region of a second conductivity type, provided with respect to the first semiconductor region on one surface side of the semiconductor substrate so as to surround a predetermined region, and constituting a light detection region together with the first semiconductor region, and a through-electrode provided within a through-hole passing through the one surface and the other surface of the semiconductor substrate so as to pass through the first semiconductor region and the predetermined region, and electrically connected to the second semiconductor region. The through-hole includes a portion expanded from the one surface toward the other surface.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: October 29, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tatsumi Yamanaka, Akira Sakamoto, Noburo Hosokawa
  • Patent number: 10418496
    Abstract: A photodiode array includes a plurality of photodiodes formed in a semiconductor substrate. Each of the photodiodes includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, provided with respect to the first semiconductor region on one surface side of the semiconductor substrate, and having an impurity concentration higher than an impurity concentration of the first semiconductor region, a third semiconductor region of a second conductivity type, provided with respect to the first semiconductor region on the one surface side so as to surround the second semiconductor region separately from the second semiconductor region, and constituting a light detection region together with the first semiconductor region, and a through-electrode provided within a through-hole passing through the first semiconductor region and the second semiconductor region, and electrically connected to the third semiconductor region.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: September 17, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tatsumi Yamanaka, Akira Sakamoto, Noburo Hosokawa
  • Patent number: 10403676
    Abstract: A method includes a first process in which a first wiring is provided on a surface of a semiconductor substrate; a second process in which a light transmitting substrate is attached to the surface; a third process in which the semiconductor substrate is thinned so that the thickness of the semiconductor substrate is smaller than the thickness of the light transmitting substrate; a fourth process in which a through hole is formed in the semiconductor substrate; a fifth process in which a dip coating method is performed using a resin material and thus a resin insulating layer is provided; a sixth process in which a contact hole is formed in the resin insulating layer; and a seventh process in which a second wiring is provided on a surface of the resin insulating layer, and the first wiring and the second wiring are electrically connected via a contact hole.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: September 3, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo Hosokawa, Nao Inoue, Katsumi Shibayama
  • Publication number: 20190172965
    Abstract: A photodetecting device includes a semiconductor substrate including a first principal surface and a second principal surface that oppose each other and a plurality of through-electrodes penetrating through the semiconductor substrate in a thickness direction. The semiconductor substrate includes a plurality of avalanche photodiodes arranged to operate in Geiger mode. The plurality of through-electrodes are electrically connected to the corresponding avalanche photodiodes. The semiconductor substrate includes a first area in which the plurality of avalanche photodiodes are distributed in at least a first direction and a second area in which the plurality of through-electrodes are distributed two-dimensionally. The first area and the second area are distributed in a second direction orthogonal to a first direction when viewed from a direction orthogonal to the first principal surface.
    Type: Application
    Filed: November 9, 2017
    Publication date: June 6, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi ISHIDA, Takashi BABA, Terumasa NAGANO, Noburo HOSOKAWA
  • Patent number: 10141368
    Abstract: In a plane including the center line of a vertical through hole, it is assumed that a segment that connects a first point corresponding to the edge of an opening of an insulating layer and a second point corresponding to the edge of a second opening is a first segment, a segment that connects the second point and a third point corresponding to an intersection point between the second opening and a surface of the insulating layer is a second segment, and a segment that connects the third point and the first point is a third segment. In the insulating layer, the first area located on one side with respect to the first segment is larger than the sum of the second area surrounded by the first, the second and the third segments and the third area located on the other side with respect to the third segment.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: November 27, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi Ishida, Noburo Hosokawa, Terumasa Nagano, Takashi Baba
  • Publication number: 20180175100
    Abstract: A method includes a first process in which a first wiring is provided on a surface of a semiconductor substrate; a second process in which a light transmitting substrate is attached to the surface; a third process in which the semiconductor substrate is thinned so that the thickness of the semiconductor substrate is smaller than the thickness of the light transmitting substrate; a fourth process in which a through hole is formed in the semiconductor substrate; a fifth process in which a dip coating method is performed using a resin material and thus a resin insulating layer is provided; a sixth process in which a contact hole is formed in the resin insulating layer; and a seventh process in which a second wiring is provided on a surface of the resin insulating layer, and the first wiring and the second wiring are electrically connected via a contact hole.
    Type: Application
    Filed: March 31, 2016
    Publication date: June 21, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo HOSOKAWA, Nao INOUE, Katsumi SHIBAYAMA
  • Publication number: 20180108625
    Abstract: A semiconductor device includes a semiconductor substrate in which a through hole is formed, a first wiring that is provided on a first surface of the semiconductor substrate, an insulating layer provided on an inner surface of the through hole and a second surface of the semiconductor substrate, and a second wiring that is provided on a surface of the insulating layer and electrically connected to the first wiring in an opening. The surface of the insulating layer includes a first region, a second region, a third region, a fourth region that is curved to continuously connect the first and the second regions, and a fifth region that is curved to continuously connect the second and the third regions. An average inclination angle of the second region is smaller than that of the first region and is smaller than that of the inner surface.
    Type: Application
    Filed: March 31, 2016
    Publication date: April 19, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo HOSOKAWA, Nao INOUE, Katsumi SHIBAYAMA
  • Publication number: 20180083143
    Abstract: A semiconductor device includes a semiconductor substrate in which a through hole is formed, a first wiring, an insulating layer, and a second wiring that is electrically connected to the first wiring in an opening of the insulating layer. The insulating layer has a first curved portion that covers an inner surface of a through hole between a first opening and a second opening and a second curved portion that covers an edge of the second opening. A surface in the first curved portion is curved in a convex shape toward the side opposite the inner surface of the through hole. The surface in the second curved portion is curved in a convex shape toward the side opposite the inner surface of the through hole.
    Type: Application
    Filed: March 31, 2016
    Publication date: March 22, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Noburo HOSOKAWA, Nao INOUE, Katsumi SHIBAYAMA
  • Publication number: 20180069145
    Abstract: In a plane including the center line of a vertical through hole, it is assumed that a segment that connects a first point corresponding to the edge of an opening of an insulating layer and a second point corresponding to the edge of a second opening is a first segment, a segment that connects the second point and a third point corresponding to an intersection point between the second opening and a surface of the insulating layer is a second segment, and a segment that connects the third point and the first point is a third segment. In the insulating layer, the first area located on one side with respect to the first segment is larger than the sum of the second area surrounded by the first, the second and the third segments and the third area located on the other side with respect to the third segment.
    Type: Application
    Filed: March 31, 2016
    Publication date: March 8, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi ISHIDA, Noburo HOSOKAWA, Terumasa NAGANO, Takashi BABA
  • Patent number: 9825071
    Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: November 21, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Patent number: 9773935
    Abstract: A semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in a semiconductor substrate, quenching resistors connected in series to the respective avalanche photodiodes and arranged on a first principal surface side of the semiconductor substrate, and a plurality of through-hole electrodes electrically connected to the quenching resistors and formed so as to penetrate the semiconductor substrate from the first principal surface side to a second principal surface side. A mounting substrate includes a plurality of electrodes arranged corresponding to the respective through-hole electrodes on a third principal surface side. The through-hole electrodes and the electrodes are electrically connected through bump electrodes, and a side surface of the semiconductor substrate and a side surface of a glass substrate are flush with each other.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: September 26, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Patent number: 9768222
    Abstract: A light detection device 1 has a semiconductor light detection element having a semiconductor substrate, and a mounting substrate arranged as opposed to the semiconductor light detection element. The semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrodes electrically connected to the respective avalanche photodiodes and arranged on a second principal surface side of the semiconductor substrate. The mounting substrate includes a plurality of electrodes arranged corresponding to the respective electrodes on a third principal surface side, and quenching resistors electrically connected to the respective electrodes and arranged on the third principal surface side. The electrodes and the electrodes are connected through bump electrodes.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: September 19, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Patent number: 9748428
    Abstract: A semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in a semiconductor substrate, quenching resistors connected in series to the respective avalanche photodiodes and arranged on a first principal surface side of the semiconductor substrate, and a plurality of through-hole electrodes electrically connected to the quenching resistors and formed so as to penetrate the semiconductor substrate from the first principal surface side to a second principal surface side. A mounting substrate includes a plurality of electrodes arranged corresponding to the respective through-hole electrodes on a third principal surface side. The through-hole electrodes and the electrodes are electrically connected through bump electrodes, and a side surface of the semiconductor substrate and a side surface of a glass substrate are flush with each other.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: August 29, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Publication number: 20160329455
    Abstract: A semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in a semiconductor substrate, quenching resistors connected in series to the respective avalanche photodiodes and arranged on a first principal surface side of the semiconductor substrate, and a plurality of through-hole electrodes electrically connected to the quenching resistors and formed so as to penetrate the semiconductor substrate from the first principal surface side to a second principal surface side. A mounting substrate includes a plurality of electrodes arranged corresponding to the respective through-hole electrodes on a third principal surface side. The through-hole electrodes and the electrodes are electrically connected through hump electrodes, and a side surface of the semiconductor substrate and a side surface of a glass substrate are flush with each other.
    Type: Application
    Filed: July 19, 2016
    Publication date: November 10, 2016
    Inventors: Terumasa NAGANO, Noburo HOSOKAWA, Tomofumi SUZUKI, Takashi BABA
  • Publication number: 20160322405
    Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.
    Type: Application
    Filed: July 12, 2016
    Publication date: November 3, 2016
    Inventors: Terumasa NAGANO, Noburo HOSOKAWA, Tomofumi SUZUKI, Takashi BABA