Patents by Inventor Noburu Fukushima
Noburu Fukushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8198647Abstract: A light emitting apparatus, includes: a substrate; a semiconductor device including a semiconductor layer formed integrally on a major surface of the substrate; and a light emitting device formed separately from the substrate. The light emitting device is mounted on the major surface of the substrate, electrically connected to the semiconductor device, and thermally connected to the substrate.Type: GrantFiled: November 24, 2009Date of Patent: June 12, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Hioki, Yutaka Nakai, Noburu Fukushima
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Publication number: 20100127296Abstract: A light emitting apparatus, includes: a substrate; a semiconductor device including a semiconductor layer formed integrally on a major surface of the substrate; and a light emitting device formed separately from the substrate. The light emitting device is mounted on the major surface of the substrate, electrically connected to the semiconductor device, and thermally connected to the substrate.Type: ApplicationFiled: November 24, 2009Publication date: May 27, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsuyoshi HIOKI, Yutaka NAKAI, Noburu FUKUSHIMA
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Patent number: 7538013Abstract: There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.Type: GrantFiled: June 22, 2006Date of Patent: May 26, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Matsushita, Yukie Nishikawa, Hideki Satake, Noburu Fukushima
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Patent number: 7525144Abstract: An insulating film includes an oxide of a metal selected from Hf and Zr, the oxide being doped by at least one of Ba, Sr and Mg. And the insulating film satisfies the following formula (1): 0.06 at %?[Ba]+[Sr]+[Mg]?1.4 at %??(1) wherein [Ba] represents atomic % of Ba, [Sr] represents atomic % of Sr, and [Mg] represents atomic % of Mg.Type: GrantFiled: March 21, 2007Date of Patent: April 28, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Noburu Fukushima
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Publication number: 20070228526Abstract: An insulating film includes an oxide of a metal selected from Hf and Zr, the oxide being doped by at least one of Ba, Sr and Mg. And the insulating film satisfies the following formula (1): 0.06 at %?[Ba]+[Sr]+[Mg]?1.4 at %??(1) wherein [Ba] represents atomic % of Ba, [Sr] represents atomic % of Sr, and [Mg] represents atomic % of Mg.Type: ApplicationFiled: March 21, 2007Publication date: October 4, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Noburu Fukushima
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Publication number: 20060237837Abstract: There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.Type: ApplicationFiled: June 22, 2006Publication date: October 26, 2006Applicant: Kabushiki Kaisha ToshibaInventors: Daisuke Matsushita, Yukie Nishikawa, Hideki Satake, Noburu Fukushima
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Patent number: 7091561Abstract: There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.Type: GrantFiled: June 9, 2004Date of Patent: August 15, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Matsushita, Yukie Nishikawa, Hideki Satake, Noburu Fukushima
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Publication number: 20050215035Abstract: Provided is a semiconductor device including a silicon substrate, a gate insulator disposed on the silicon substrate and containing a metal oxide, a gate electrode disposed on the gate insulator, and a sidewall insulating film disposed on a side of the gate insulator and the gate electrode and containing aluminum, silicon, oxygen and nitrogen.Type: ApplicationFiled: May 25, 2005Publication date: September 29, 2005Inventors: Takeshi Yamaguchi, Hideki Satake, Noburu Fukushima
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Patent number: 6930335Abstract: Provided is a semiconductor device including a silicon substrate, a gate insulator disposed on the silicon substrate and containing a metal oxide, a gate electrode disposed on the gate insulator, and a sidewall insulating film disposed on a side of the gate insulator and the gate electrode and containing aluminum, silicon, oxygen and nitrogen.Type: GrantFiled: March 27, 2003Date of Patent: August 16, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Yamaguchi, Hideki Satake, Noburu Fukushima
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Patent number: 6914312Abstract: A MIS type field effect transistor including gate dielectrics having a rare-earth metal oxynitride layer with a high dielectric constant, which can maintain good interface characteristics, can be provided. A field effect transistor according to one aspect of this invention includes a gate dielectric having a substantially crystalline rare-earth metal oxynitride layer containing one or more metals selected from rare-earth metals, oxygen, and nitrogen. The rare-earth metal oxynitride layer contacts a predetermined region of a Si semiconductor substrate, and the nitrogen exists at the interface between the rare-earth metal oxynitride layer and the Si semiconductor substrate, and in the bulk of the rare-earth metal oxynitride. The transistor further includes a gate electrode formed on the gate dielectrics and source and drain regions, one being formed at one side of the gate electrode and the other being formed at the other side of the gate electrode in the Si semiconductor substrate.Type: GrantFiled: March 26, 2003Date of Patent: July 5, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Yukie Nishikawa, Noburu Fukushima, Takeshi Yamaguchi, Hideki Satake
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Publication number: 20050017304Abstract: There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.Type: ApplicationFiled: June 9, 2004Publication date: January 27, 2005Inventors: Daisuke Matsushita, Yukie Nishikawa, Hideki Satake, Noburu Fukushima
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Publication number: 20030209816Abstract: Provided is a semiconductor device including a silicon substrate, a gate insulator disposed on the silicon substrate and containing a metal oxide, a gate electrode disposed on the gate insulator, and a sidewall insulating film disposed on a side of the gate insulator and the gate electrode and containing aluminum, silicon, oxygen and nitrogen.Type: ApplicationFiled: March 27, 2003Publication date: November 13, 2003Inventors: Takeshi Yamaguchi, Hideki Satake, Noburu Fukushima
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Publication number: 20030183885Abstract: A MIS type field effect transistor including gate dielectrics having a rare-earth metal oxynitride layer with a high dielectric constant, which can maintain good interface characteristics, can be provided. A field effect transistor according to one aspect of this invention includes a gate dielectric having a substantially crystalline rare-earth metal oxynitride layer containing one or more metals selected from rare-earth metals, oxygen, and nitrogen. The rare-earth metal oxynitride layer contacts a predetermined region of a Si semiconductor substrate, and the nitrogen exists at the interface between the rare-earth metal oxynitride layer and the Si semiconductor substrate, and in the bulk of the rare-earth metal oxynitride. The transistor further includes a gate electrode formed on the gate dielectrics and source and drain regions, one being formed at one side of the gate electrode and the other being formed at the other side of the gate electrode in the Si semiconductor substrate.Type: ApplicationFiled: March 26, 2003Publication date: October 2, 2003Applicant: Kabushiki Kaisha ToshibaInventors: Yukie Nishikawa, Noburu Fukushima, Takeshi Yamaguchi, Hideki Satake
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Patent number: 6170147Abstract: A starting material which is converted to a continuous body of an oxide superconductor by a heat treatment is filled in a tubular Ag sheath member. The diameter of the filled member is reduced by extrusion to form a wire. The wire is subjected to a heat treatment so that the starting material inside the sheath member is converted to a continuous body of an oxide superconductor. A superconducting wire constituted by the sheath member and the oxide superconductor filled inside the sheath member is obtained. A superconducting coil can be obtained by winding the superconducting wire.Type: GrantFiled: June 5, 1995Date of Patent: January 9, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Yamada, Satoru Murase, Hisashi Yoshino, Noburu Fukushima, Hiromi Niu, Shigeo Nakayama, Misao Koizumi
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Patent number: 6060735Abstract: A thin film dielectric device is disclosed, that comprises a substrate, a lower electrode formed on the substrate and composed of a laminate film having columnar grains that have grown in a vertical to a surface of the substrate, a dielectric thin film formed on the lower electrode and composed of a perovskite oxide, the dielectric thin film being a polycrystalline film having columnar grains that have successively grown from the columnar grains of the lower electrode and that takes over a crystal orientation of the lower electrode, the lattice constant of the lower electrode being matched with the lattice constant of the dielectric thin film at the interface therebetween with the columnar grains, and an upper electrode formed on the dielectric thin film. The lattice matching of the columnar grains solves problems of the increase of the leak current of the thin film dielectric device and the degradation of the dielectric breakdown resistance.Type: GrantFiled: September 4, 1997Date of Patent: May 9, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuaki Izuha, Noburu Fukushima, Kazuhide Abe
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Patent number: 5986301Abstract: A thin film capacitor comprises a dielectric thin film having a perovskite structure sandwiched between top and bottom electrodes. At least one of the top and bottom electrodes is made of a conductive oxide material having a perovskite structure represented with a general formula of ABO.sub.3 in which A represents A-site elements composed of at least two of alkaline-earth and rare earth metals, and B represents B-site elements composed of at least one of transition metals. The capacitors involve a small leakage current, occupy a small area, and provide large capacitance. Accordingly, the capacitors realize a high integration semiconductor memory such as a DRAM of gigabit order.Type: GrantFiled: May 19, 1997Date of Patent: November 16, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Noburu Fukushima, Takashi Kawakubo, Tatsuo Shimizu
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Patent number: 5935911Abstract: A starting material which is converted to a continuous body of an oxide superconductor by a heat treatment is filled in a tubular Ag sheath member. The diameter of the filled member is reduced by extrusion to form a wire. The wire is subjected to a heat treatment so that the starting material inside the sheath member is converted to a continuous body of an oxide superconductor. A superconducting wire constituted by the sheath member and the oxide superconductor filled inside the sheath member is obtained. A superconducting coil can be obtained by winding the superconducting wire.Type: GrantFiled: June 5, 1995Date of Patent: August 10, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Yamada, Satoru Murase, Hisashi Yoshino, Noburu Fukushima, Hiromi Niu, Shigeo Nakayama, Misao Koizumi
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Patent number: 5889299Abstract: A thin film capacitor including a first electrode having on its surface a (100) face of cubic system or a (001) face of tetragonal system, a dielectric thin film epitaxially grown on the first electrode and exhibiting a crystal structure which inherently belongs to a perovskite structure of cubic system, and a second electrode formed on the dielectric thin film. Further, the dielectric thin film meets the following relationship V/V.sub.0 .gtoreq.1.01 where a unit lattice volume of true perovskite crystal structure belonging to the cubic system (lattice constant a.sub.0) is represented by V.sub.0 =a.sub.0.sup.3, and a unit lattice volume (lattice constant a=b.noteq.c) which is strained toward a tetragonal system after the epitaxial growth is represented by V=a.sup.2 c, and also meets the following relationship c/a.gtoreq.1.01 where c/a represents a ratio between a lattice constant "c" in the direction thicknesswise of the film and a lattice constant "a" in the direction parallel with a plane of the film.Type: GrantFiled: February 21, 1997Date of Patent: March 30, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhide Abe, Shuichi Komatsu, Mitsuaki Izuha, Noburu Fukushima, Kenya Sano, Takashi Kawakubo
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Patent number: 5889696Abstract: A semiconductor memory device is constituted by arranging a plurality of memory cells in a matrix format, each of which includes a thin-film capacitor having a ferroelectric film and a pair of electrodes facing each other via the ferroelectric film, and a transfer gate transistor connected to the thin film capacitor. A voltage corresponding to the width of a hysteresis curve obtained when the thin-film capacitor is saturated and polarized falls within the range of 5% or higher to 20% or lower of the voltage difference between the positive and negative directions in a writing operation. A remanent polarization amount obtained when the thin-film capacitor is saturated and polarized falls within the range of 5% or higher to 30% or lower of the total polarization amount obtained upon application of a voltage in the writing operation.Type: GrantFiled: March 23, 1998Date of Patent: March 30, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Takashi Kawakubo, Noburu Fukushima, Kazuhide Abe
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Patent number: 5739563Abstract: A semiconductor memory device comprising a silicon substrate, a plurality of switching transistors formed on the silicon substrate, an insulating layer having an opening and formed on a surface portion of the silicon substrate where the plurality of switching transistors formed, and a plurality of capacitors for accumulating electric charge formed on the insulating layer and connected respectively to the switching transistors via a conductive film buried in the opening of insulating layer, wherein each of the capacitors for accumulating electric charge is provided with an underlying crystal layer formed on the insulating layer and with a dielectric film consisting essentially of a ferroelectric material and epitaxially or orientationaly grown on the underlying crystal layer, and the switching transistors and the capacitors for accumulating electric charge connected to each other constitute a plurality of memory cells arranged in a two-dimensional pattern.Type: GrantFiled: November 17, 1995Date of Patent: April 14, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Takashi Kawakubo, Kenya Sano, Kazuhide Abe, Shuichi Komatsu, Noburu Fukushima, Kazuhiro Eguchi