Abstract: The microcomputer provides with surroundings where data in a RAM can be monitored on the outside without employing an external bus. When a command requesting accessing to a RAM is received from an external monitor, a real time debugger built in the microcomputer confirms that a CPU is not accessing the RAM, and accesses the RAM. On the other hand, when accessing to an emROM, which emulates an actual ROM, is requested from the monitor, the real time debugger accesses one of emROMs which is not being used by the CPU at present.

Abstract: A microcomputer including a boot ROM that stores a boot program for transferring from an outside source to a RAM an erase/write program for rewriting a flash ROM. A CPU transfers the boot program from the boot ROM to the RAM, and executes it in a boot mode, and relocates the entire interrupt vectors excluding a reset interrupt vector to the RAM in the boot mode, with the reset interrupt vector remaining in the boot ROM. This enables the erase/write program transferred to the RAM to execute interrupt processings which cannot be carried out in a conventional microcomputer.

Abstract: An output timer includes a capture register for capturing a count value held by a free running up-counter in coorporation with a transmission gate in response to an event signal applied to the output timer. An adder adds a first value stored in another register to the count value captured by the capture register and produces a sum. A comparator compares a count value held by the free running up-counter with the sum and outputs a coincidence signal when the count value and sum are equal to each other. A set-reset flip-flop includes a set terminal for receiving the event signal and a reset terminal connected to the output terminal of the comparator.

Abstract: A semiconductor integrated circuit device incorporates logical arithmetic circuits (11) in order to set the internal circuits (7, 10) to a stable state. Each logical arithmetic circuit (11) is placed between each of input terminals (5, 9) that are not used during a boot operation mode, and each of internal circuits (7, 10).

Abstract: A flash memory comprising a power supply controller and a second controller, as well as a microcomputer incorporating the flash memory. A power supply terminal of the power supply controller is furnished separately from a power supply terminal of those circuits in the second controller which operate on the same supply voltage as the power supply controller, whereby controlled voltages and ground potential are stabilized for the memory and microcomputer.

Abstract: There is provided an analog-to-digital converter comprising a first data register (4) for storing an m-bit analog-to-digital conversion result, a second data register (5) for storing an n-bit (n is smaller than m) analog-to-digital conversion result, and an analog-to-digital conversion control circuit (3) for transferring the n (n is smaller than m) highmost bits of the m-bit analog-to-digital conversion result stored in the first data register (4) as an n-bit analog-to-digital conversion result to the second data register (5).

Abstract: A microcomputer having a program storing unit (16) separately from a CPU. The program storing unit (16) receives from a host computer (7) a boot program used for loading data into a flash memory (11), and stores the boot program into a RAM (2), when a mode decision circuit (15) makes a decision that a chip mode is an RSIF mode. This solves a problem of a conventional microcomputer in that it must reserve a boot program area in the flash memory in advance to prestore the boot program in the boot program area, and hence the entire area of the flash memory cannot be released as a user program area.

Abstract: The invention provides a counting device and a direct memory access system using the counting device. In the counting device, a carry/borrow signal to be supplied from a predetermined one-bit counter among a plurality of one-bit counters to another one-bit counter in the subsequent stage is inputted to an input/cutoff element such as an AND circuit. The input/cutoff element is also supplied with a control signal for controlling the input/cutoff of the carry/borrow signal. Thus, the range of the values to be counted can be changed.

Abstract: To enable data transfer between desired clock synchronous serial input/output devices without the need of a specific transmission/reception protocol, ordinary data and device number data for specifying a receiving input/output device are transmitted as data to be transmitted. When the data to be transmitted is the device number data stored in an identification information register, an input/output device having this device number is selected, and data is transferred to the input/output device.

Abstract: A comparator is provided in the counter circuit to compare the counted value of clocks by a counter with the value of a register in which a target changing value of a comparison register which sets a value to be compared with the counted value of the counter is set. The value of the register is set in the comparison register when the counted value of the counter does not reach the set value of the register, whereas the value of the register is not set in the comparison register if the counted value does not reach the set value of the register, but the value of the comparison register is turned changeable at the desired timing while the counted value of the counter is being compared with the set value of the comparison register.

Abstract: In a semiconductor device such as a one-chip microcomputer having therein a runaway monitor (watch dog timer) there is provided a control unit for directly controlling the state of an input/output port on the basis of an output (overflow signal) of the runaway monitor and for controlling, in response to the detection of the runaway, the input/output port so that only the input of the input/output port becomes effective. This arrangement can separate the semiconductor device from an external system at the real time when the semiconductor device enters into the runaway state.