Patents by Inventor Nobusuke Yamaoka
Nobusuke Yamaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200129044Abstract: A medical observation apparatus includes: an image sensor configured to image an observation target and generate a medical captured image by sequential reading; and a controller configured to control lighting of light sources configured to irradiate light to the observation target. The controller is configured to perform a first control including a control of lighting a light source configured to irradiate white light, and a second control including a control of lighting a light source configured to irradiate excitation light, and the first control is performed in a period that spans over a boundary of successive frames.Type: ApplicationFiled: October 23, 2019Publication date: April 30, 2020Applicant: Sony Olympus Medical Solutions Inc.Inventor: Nobusuke YAMAOKA
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Publication number: 20200099864Abstract: Provided is a medical observation apparatus, including: a control unit that controls a zoom of an imaging device based on a distance between the imaging device supported by an arm in which a plurality of links are connected to each other through a joint portion, and an observation target, in which the control unit controls the zoom such that an index value relevant to an actual field of view of the imaging device approximates to a target value that is set.Type: ApplicationFiled: December 27, 2017Publication date: March 26, 2020Applicant: Sony Olympus Medical Solutions Inc.Inventors: Hiroki SAIJO, Nobusuke YAMAOKA
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Patent number: 10574976Abstract: A medical stereoscopic observation apparatus having circuitry that acquires a status signal according to a status of image processing from each image processing circuit of a plurality of image processing circuits that perform the image processing on input image data through a selected image processing unit among a plurality of image processing units in the respective image processing circuit and generates output image data to be output as a right eye image or a left eye image, and causes a second image processing circuit different from a first image processing circuit to switch the selected image processing unit to match the selected image processing unit of the first image processing circuit, according to the status signal acquired from the first image processing circuit among the image processing circuits of the plurality of image processing circuits.Type: GrantFiled: December 7, 2015Date of Patent: February 25, 2020Assignee: SONY OLYMPUS MEDICAL SOLUTIONS INC.Inventors: Nobusuke Yamaoka, Aki Mizukami
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Publication number: 20160165222Abstract: There is provided a medical stereoscopic observation apparatus, including an acquiring unit configured to acquire a status signal according to a status of image processing from each of image processing sections of a plurality of systems that perform the image processing on input image data through a selected image processing unit among a plurality of image processing units and generate output image data to be output as a right eye image or a left eye image, and a control unit configured to cause a second image processing section different from a first image processing section to switch the selected image processing unit according to the status signal acquired from the first image processing section among the image processing sections of the plurality of systems.Type: ApplicationFiled: December 7, 2015Publication date: June 9, 2016Applicant: SONY OLYMPUS MEDICAL SOLUTIONS INC.Inventors: Nobusuke YAMAOKA, Aki Mizukami
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Patent number: 7116455Abstract: An imaging apparatus having a projector function which is advantageous in reducing size is provided. A light source of the imaging apparatus is constituted by three semiconductor lasers which respectively frontward emit lights of red, green and blue, each slit-shaped. To a GLV (Grating Light Valve) is applied a drive voltage as modulated by a projection image signal, so that the GLV diffracts the three lights emitted from the light source, with varying the amount or intensity of each light in accordance with the drive voltage or projection image signal. A scanning mirror is disposed between a taking lens and an image pickup device, so as to reflect the lights diffracted by the GLV toward the taking lens, with having each diffracted slit-shaped light scan in a direction.Type: GrantFiled: September 20, 2004Date of Patent: October 3, 2006Assignee: Sony CorporationInventor: Nobusuke Yamaoka
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Publication number: 20050099664Abstract: An imaging apparatus having a projector function which is advantageous in reducing size is provided. A light source of the imaging apparatus is constituted by three semiconductor lasers which respectively frontward emit lights of red, green and blue, each slit-shaped. To a GLV (Grating Light Valve) is applied a drive voltage as modulated by a projection image signal, so that the GLV diffracts the three lights emitted from the light source, with varying the amount or intensity of each light in accordance with the drive voltage or projection image signal. A scanning mirror is disposed between a taking lens and an image pickup device, so as to reflect the lights diffracted by the GLV toward the taking lens, with having each diffracted slit-shaped light scan in a direction.Type: ApplicationFiled: September 20, 2004Publication date: May 12, 2005Applicant: SONY CORPORATIONInventor: Nobusuke Yamaoka
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Patent number: 6603363Abstract: There are provided the delay coarse adjustment circuit 3, the delay fine adjustment circuit 4, and the inverter circuit 5. The delay coarse adjustment circuit 3 stepwise varies a delay amount based on the delay coarse adjustment signal S11 and supplies the input oscillation signal S12 with a coarse delay. The delay fine adjustment circuit 4 stepwise varies a delay amount based on the delay fine adjustment signal S2 and supplies the input oscillation signal S13 with a fine delay which is smaller than a delay amount supplied by the delay coarse adjustment circuit 3. The inverter circuit 5 inputs the oscillation signal S14 from the delay coarse adjustment circuit 3 or the delay fine adjustment circuit 4. The delay coarse adjustment circuit 3 coarsely adjusts delays. The delay fine adjustment circuit 4 fine adjusts delays. The coarse and fine adjustments provide a precision delay to generate the oscillation output signal S15.Type: GrantFiled: October 16, 2000Date of Patent: August 5, 2003Assignee: Sony CorporationInventors: Nobusuke Yamaoka, Ichiro Okamoto, Takehiko Saito, Yasutaka Kotani, Kenji Nikata
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Patent number: 6166572Abstract: A clock/data recovery device employs a phase-locked loop that supplies a single clock signal and a control voltage signal to at least one clock/data recovery circuit. The clock/data recovery circuit has a voltage-controlled delay line or direct phase controlled voltage-controlled oscillator that generates a multiple-phase clock signal, which is used to recover a clock signal and data from a received data signal. The voltage-controlled delay line or direct phase controlled vottage-controlled oscillator has a cascade or ring of voltage controlled logic gates, with propagation delays controlled by the control voltage signal from the phase-locked loop, and additional logic gates that supply the clock signal from the phase-locked loop to a selectable one of the voltage-controlled logic gates.Type: GrantFiled: March 18, 1998Date of Patent: December 26, 2000Assignee: Oki Electric Industry Co., Ltd.Inventor: Nobusuke Yamaoka
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Patent number: 5920600Abstract: In bit phase synchronizing circuitry, received data with an unknown phase and triphase clocks output from a reset VCO (Voltage Controlled Oscillator) are input to a timing decision circuit. If preselected one of the triphase clocks and the received data have an adequate relation, the decision circuit causes the current clock phase to be maintained. If otherwise, the decision circuit determines whether the current clock phase should be advanced or retarded. The resulting decision signal output from the decision circuit is fed to a selector controller. The decision circuit latches the received data with the preselected one of the triphase clocks and outputs them together with the clock used for latching. A phase controller causes the reset VCO to selectively operate in a phase shift mode or in a multiplication PLL (Phase Locked Loop) mode. The circuitry is capable of setting up bit phase synchronization stably and rapidly with a simple configuration without regard to the phase of the received data.Type: GrantFiled: September 17, 1996Date of Patent: July 6, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Nobusuke Yamaoka, Takashi Taya, Akira Yoshida, Shuichi Matsumoto