Patents by Inventor Nobutaka Imamura

Nobutaka Imamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100125550
    Abstract: Each of plurality of nodes connected to each other via a network includes a local instance processor and a user application processor. The local instance processor executes a data sharing method for accessing shared data. The data sharing method includes: storing a value of first shared data with a function identifier of an update function upon receiving a registration request, wherein the update function is commutative and idempotent; updating the stored value of the first shared data to a first update value in accordance with an execution result of the update function upon receiving an update request; returning a completion message upon updating the stored value of the first shared data stored in the first node; and transmitting a first reflection request to a second node upon updating the stored value of the first shared data stored in the first node.
    Type: Application
    Filed: November 5, 2009
    Publication date: May 20, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Nobutaka IMAMURA, Yuichi Tsuchimoto, Toshihiro Shimizu, Hiromichi Kobashi, Miho Murata, Soichi Shigeta
  • Publication number: 20100008374
    Abstract: A relay apparatus includes: a tag information acquisition section that acquires tag information attached to the network-connected device; a management section that manages the tag information read out by the tag information acquisition section and an IP address assigned by the management apparatus, and an identification information assigned to the relay apparatus itself in association with one another; and a processing section that receives information that the management apparatus has transmitted with the tag information or IP address as a transmission destination and receives information transmitted from the network-connected device for execution of predetermined processing.
    Type: Application
    Filed: September 23, 2009
    Publication date: January 14, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Soichi Shigeta, Nobutaka Imamura
  • Publication number: 20080295103
    Abstract: According to an aspect of an embodiment, a method for controlling a processing device for distributing jobs among a plurality of job processing devices for executing said jobs, respectively, said job including a plurality of job files, the method comprises: determining said job processing devices for executing said job files, respectively; generating an execution file to be executed by first job processing device after first job file is executed by said first job processing device, said execution file when executed having said first job processing devise requests second job processing device to execute second job file, said second job file being executed by said second job processing device subsequently to said second job file executed by said first job processing device; and transferring said first job file and said execution file to said first job processing device.
    Type: Application
    Filed: May 19, 2008
    Publication date: November 27, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Nobutaka Imamura
  • Publication number: 20070288646
    Abstract: The communication I/F unit according to the present invention includes a chain executing unit that executes all the chain SWRs. The SWR-chain storage unit stores therein a chain of SWRs. The chain executing unit sequentially reads the SWRs and executes the corresponding operations of an atomic operation so that the corresponding packets are sent outside.
    Type: Application
    Filed: April 26, 2007
    Publication date: December 13, 2007
    Applicant: Fujitsu Limited
    Inventor: Nobutaka Imamura
  • Publication number: 20070277019
    Abstract: A first storing unit stores therein a chain indivisibility instruction. A detecting unit detects a change of first data that is distributed in a node computer. A first designating unit designates, when the detecting unit detects the change in the first data, an indivisibility instruction corresponding to the first data from which the change is detected, by referring to the first storing unit. A first executing unit executes the indivisibility instruction designated by the first designating unit.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 29, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Nobutaka Imamura
  • Publication number: 20070230347
    Abstract: A node computer includes a communication I/F unit that performs the synchronization process of the packet related to the synchronization process that is conventionally performed by a processor. An interrupt generated every time a packet including the message related to the synchronization process is received can be reduced to one interrupt.
    Type: Application
    Filed: October 27, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Nobutaka Imamura
  • Publication number: 20050238930
    Abstract: A non-aqueous electrolyte battery comprising: a battery case containing aluminum; a positive electrode terminal attached to the battery case; and a negative electrode terminal attached to the battery case and insulated from the battery case, wherein the positive electrode terminal and the battery case are connected through a resistor having resistance of 1 ? to 1 M?. Otherwise, A non-aqueous electrolyte battery comprising: a battery case containing iron; a negative electrode terminal attached to the battery case; and a positive electrode terminal attached to the battery case and insulated from the battery case, wherein the negative electrode terminal and the battery case are connected through a resistor having resistance of 1 ? to 1 M?.
    Type: Application
    Filed: December 3, 2004
    Publication date: October 27, 2005
    Inventors: Hiroaki Yoshida, Nobutaka Imamura
  • Patent number: 6696199
    Abstract: An insulating sleeve 6 made of ceramic hermetically fixed into an opening in a terminal supporting plate 7 in a battery sheath made of metal, a positive terminal 4 made of an aluminum alloy or negative terminal 5 made of a copper alloy is inserted in the insulating sleeve, and a metallic ring is fitted over the positive terminal 4 or negative terminal 5. The inner edge of the metallic ring 11 and the positive terminal 4 or negative terminal 5 are hermetically fixed to each other by an aluminum-based brazing metal 8 or copper-based brazing metal 9, and the outer edge of the metallic ring 11 and the insulating sleeve 6 are hermetically fixed to each other by an aluminum-based brazing metal 8 or copper-based brazing metal 9.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: February 24, 2004
    Assignee: Japan Storage Battery Co., Ltd.
    Inventors: Hiroaki Yoshida, Takefumi Inoue, Nobutaka Imamura, Tatsuya Iwamoto, Taro Naoi, Naozumi Miyanaga, Teruhiro Hatanaka, Masaru Sashiki, Kouji Kamata, Hideki Yamazaki
  • Publication number: 20030143460
    Abstract: An insulating sleeve 6 made of ceramic hermetically fixed into an opening in a terminal supporting plate 7 in a battery sheath made of metal, a positive terminal 4 made of an aluminum alloy or negative terminal 5 made of a copper alloy is inserted in the insulating sleeve, and a metallic ring is fitted over the positive terminal 4 or negative terminal 5. The inner edge of the metallic ring 11 and the positive terminal 4 or negative terminal 5 are hermetically fixed to each other by an aluminum-based brazing metal 8 or copper-based brazing metal 9, and the outer edge of the metallic ring 11 and the insulating sleeve 6 are hermetically fixed to each other by an aluminum-based brazing metal 8 or copper-based brazing metal 9.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 31, 2003
    Inventors: Hiroaki Yoshida, Takefumi Inoue, Nobutaka Imamura, Tatsuya Iwamoto, Taro Naoi, Naozumi Miyanaga, Teruhiro Hatanaka, Masaru Sashiki, Kouji Kamata, Hideki Yamazaki
  • Patent number: 6246217
    Abstract: An artificial satellite is equipped with solar batteries and a non-aqueous electrolyte battery module for artificial satellite (i.e., a lithium battery). The non-aqueous electrolyte battery module is provided with a non-aqueous electrolyte battery, a temperature sensor, a charged state measurement sensor, and a computer for receiving signals output from the sensors. The managed temperature of the non-aqueous electrolyte battery in a solstice season is set so as to become equal to or lower than the managed temperature of the battery when the satellite is in the solstice season. The computer controls a temperature controller, thereby maintain the managed temperature of the battery within a given temperature range. The charged state of the lithium battery is controlled by means of turning on or off a charging switch under the control of computer. When the satellite is in the eclipse season, the managed charged state of the non-electrolyte battery is controlled so as to be a value of 50% or more.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: June 12, 2001
    Assignee: Japan Storage Battery Co., Ltd.
    Inventors: Hiroaki Yoshida, Takefumi Inoue, Naozumi Miyanaga, Nobutaka Imamura
  • Patent number: 5781741
    Abstract: A method for message communications between multiple processor elements in a parallel computer according to this invention comprises the steps of: directly writing a message body containing message information of a message from a transmitting processor element into a shared memory area in a memory of a receiving processor element by a remote writing unit; transmitting a header containing identifier information and pointer information for the message from the transmitting processor element to a message receiving unit of the receiving processor element; and writing the header into a local memory area in the memory in the order of arrival of the headers by the message receiving unit of the receiving processor element.
    Type: Grant
    Filed: June 29, 1995
    Date of Patent: July 14, 1998
    Assignee: Fujitsu Limited
    Inventors: Nobutaka Imamura, Hiroaki Ishihata