Patents by Inventor Nobutaka Matsuoka

Nobutaka Matsuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150243638
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor chip, a package that surrounds the semiconductor chip, a first electrode terminal of which an upper end portion is aligned with and exposed at an upper surface of the package or protrudes from the upper surface of the package on an upper side of the package, and of which a lower end portion is aligned with and exposed at a lower surface of the package, or protrudes from the lower surface of the package on a lower side of the package, and a second electrode terminal of which an upper end portion is aligned with and exposed at the upper surface of the package, or protrudes from the upper surface of the package on the upper side of the package, and of which a lower end portion is aligned with and exposed at the lower surface of the package or protrudes from the lower surface of the package on the lower side of the package.
    Type: Application
    Filed: August 29, 2014
    Publication date: August 27, 2015
    Inventor: Nobutaka MATSUOKA
  • Publication number: 20140167241
    Abstract: A semiconductor device includes a resin package, a semiconductor element, a sealing resin, and a metal terminal. The sealing resin is filled into the resin package to seal the semiconductor element and the insulating substrate. The metal terminal is extended from the inside of the resin package to the outside of the resin package and electrically is connected to the semiconductor element inside of the resin package. The metal terminal has a busbar mounting portion provided with a hole for a bolt to pass therethrough and configured by a parallel planar body on the top surface of the resin package including the resin top plate, a lead portion connected to the busbar mounting portion extended in a direction perpendicular to the surface of the heat sink, and a spring structure having a bias in a direction perpendicular to the surface of the resin package in the busbar mounting portion.
    Type: Application
    Filed: June 11, 2013
    Publication date: June 19, 2014
    Inventor: Nobutaka MATSUOKA
  • Publication number: 20130105934
    Abstract: A semiconductor device includes a semiconductor substrate of a first electroconductive type, a first principal electrode arranged on a first side of the semiconductor substrate, a first semiconductor layer of a second electroconductive type arranged on a second side of the semiconductor substrate and at a certain distance from an edge of the semiconductor substrate, plural second semiconductor layer portions of the second electroconductive type arranged on the second side of the semiconductor substrate and positioned selectively in between the edge and the first semiconductor layer, an insulating film arranged to cover a portion of the first semiconductor layer from the edge, an electroconductive film arranged to cover portions of the insulating film and the first semiconductor layer, and a second principal electrode arranged in contact with the first semiconductor layer and the electroconductive film.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Inventor: Nobutaka MATSUOKA
  • Patent number: 4962056
    Abstract: According to the method of the present invention of manufacturing, from a semiconductor wafer, a dielectric substrate including insulated and separated island regions, a silicon oxide film is formed on a surface of a monocrystalline semiconductor wafer, and a mask consisting of a frame portion spreading on a peripheral region of the wafer and a grid-like portion arranged within the frame portion is formed. Then, in a patterning step, the surface of the wafer is exposed with the frame portion and the grid-like portion of the mask being left. Separation grooves arranged in a grid-like manner are formed in the exposed surface by etching. After a silicon oxide film is formed on the surfaces of the grooves, a polycrystalline semiconductor layer is made to grow on the silicon oxide film formed on the surfaces of the grooves and on the silicon oxide film formed on the surface of the wafer.
    Type: Grant
    Filed: January 4, 1989
    Date of Patent: October 9, 1990
    Assignee: Kabushiki Kaishi Toshiba
    Inventors: Bunshiro Yamaki, Nobutaka Matsuoka
  • Patent number: 4888304
    Abstract: The present semiconductor device comprises a first semiconductor substrate, an oxide film formed on the substrate and a second semiconductor substrate bonded to the oxide film. In particular, the semiconductor substrate further has a monocrystalline silicon layer which is formed by an epitaxial growth method on the second semiconductor substrate. Circuit elements are formed within the monocrystalline silicon layer.
    Type: Grant
    Filed: December 22, 1986
    Date of Patent: December 19, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kaoru Nakagawa, Yoshio Yamamoto, Nobutaka Matsuoka