Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is lower in crystallinity than the first region and the second region.

Abstract: Provided are a laser annealing apparatus, a laser annealing method, and a mask with which scan nonuniformity can be decreased. According to the present invention, all or some openings of a plurality of openings are configured so that a partial subregion of a prescribed region is irradiated with laser light. The plurality of openings are configured so that, between prescribed regions irradiated with laser light via a group of openings in one row arranged in a row direction and prescribed regions irradiated with laser light via a group of openings in another row arranged in the row direction, the number of times of laser light radiations in subregions having the same occupying region is the same, and at least two openings of a group of openings arranged in a column direction have different positions or shapes.

Abstract: A laser annealing method includes: step A of providing a substrate having an amorphous semiconductor film formed on a surface thereof; and step B of selectively irradiating a portion of the amorphous semiconductor film with laser light. The step B includes a step of simultaneously forming, in the portion, two molten regions that have elongate shapes congruent to each other and are arranged in line symmetry with each other.

Abstract: A laser irradiation apparatus includes a light source that generates a laser beam, a projection lens that radiates the laser beam onto a predetermined region of an amorphous silicon thin film deposited on each of a plurality of thin film transistors on a glass substrate, and a projection mask pattern provided on the projection lens and has a plurality of openings so that the laser beam is radiated onto each of the plurality of thin film transistors, wherein the projection lens radiates the laser beam onto the plurality of thin film transistors on the glass substrate, which moves in a predetermined direction, through the projection mask pattern, and the projection mask pattern is provided such that the openings are not continuous in one column orthogonal to the moving direction.

Abstract: A laser annealing apparatus 100 includes a laser irradiation device 10 to emit a plurality of laser beams LB toward an irradiation region R1 of a stage 20, the laser irradiation device including: a laser device to emit a laser beam LA; and a convergence unit that includes a microlens array 34 having a plurality of microlenses 34A arranged in m rows and n columns and a mask 32 having a plurality of apertures 32A, the convergence unit 30 receiving the laser beam from the laser device to form respective convergence points of the plurality of laser beams within the irradiation region R1. The plurality of laser beams are p rows and q columns of laser beams formed by p rows and q columns of microlenses (p<m or q<n) among the m rows and n columns of microlenses.

Abstract: A thin film transistor includes: a gate electrode supported on a substrate; a gate insulating layer that covers the gate electrode; an oxide semiconductor layer provided on the gate insulating layer and having a crystalline region, the crystalline region including a first region, a second region, and a channel region located between the first region and the second region, wherein the channel region, the first region and the second region overlap with the gate electrode with the gate insulating layer interposed therebetween; a protection insulating layer arranged on the oxide semiconductor layer so that the channel region is covered and the first region and the second region are exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region, wherein a crystallinity of the channel region is different from a crystallinity of the first region and the second region.

Abstract: The present invention provides a positive type photosensitive siloxane composition in which a film formed by the same has high heat resistance, high strength and high crack resistance, an active matrix substrate in which by-product is not generated, an occurrence of defects is suppressed, and an interlayer insulating film is easily formed at a low cost while having good transmittance, a display apparatus including the active matrix substrate, and a method of manufacturing the active matrix substrate. An active matrix substrate includes a plurality of gate wirings provided so as to extend parallel to each other on an insulating substrate, and a plurality of source wirings provided so as to extend parallel to each other in a direction intersecting the respective gate wirings. An interlayer insulating film and a gate insulating film are interposed at portions including the intersecting portions of the gate wirings and the source wirings, on a lower side of the source wiring.

Abstract: Provided are a laser annealing apparatus, a laser annealing method, and a mask with which scan nonuniformity can be decreased. According to the present invention, all or some openings of a plurality of openings are configured so that a partial subregion of a prescribed region is irradiated with laser light. The plurality of openings are configured so that, between prescribed regions irradiated with laser light via a group of openings in one row arranged in a row direction and prescribed regions irradiated with laser light via a group of openings in another row arranged in the row direction, the number of times of laser light radiations in subregions having the same occupying region is the same, and at least two openings of a group of openings arranged in a column direction have different positions or shapes.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is higher in crystallinity than the first region and the second region.

Abstract: A laser annealing method includes: step A of providing a substrate having an amorphous semiconductor film formed on a surface thereof; and step BF of selectively irradiating a portion of the amorphous semiconductor film with laser light. Step B includes a step of simultaneously forming, in said portion, a first melted region that is elongated in a first direction and a second direction that is elongated in a second melted region different from the first direction.

Abstract: A laser annealing method includes: step A of providing a substrate having an amorphous semiconductor film formed on a surface thereof; and step B of selectively irradiating a portion of the amorphous semiconductor film with laser light. The step B includes a step of simultaneously forming, in the portion, two molten regions that have elongate shapes congruent to each other and are arranged in line symmetry with each other.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is higher in crystallinity than the first region and the second region.

Abstract: A thin film transistor includes: a gate electrode supported on a substrate; a gate insulating layer that covers the gate electrode; an oxide semiconductor layer provided on the gate insulating layer and having a crystalline region, the crystalline region including a first region, a second region, and a channel region located between the first region and the second region, wherein the channel region, the first region and the second region overlap with the gate electrode with the gate insulating layer interposed therebetween; a protection insulating layer arranged on the oxide semiconductor layer so that the channel region is covered and the first region and the second region are exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region, wherein a crystallinity of the channel region is different from a crystallinity of the first region and the second region.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is lower in crystallinity than the first region and the second region.

Abstract: In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape.

Abstract: A laser irradiation apparatus includes a light source that generates a laser beam, a projection lens that radiates the laser beam onto a predetermined region of an amorphous silicon thin film deposited on each of a plurality of thin film transistors on a glass substrate, and a projection mask pattern provided on the projection lens and has a plurality of openings so that the laser beam is radiated onto each of the plurality of thin film transistors, wherein the projection lens radiates the laser beam onto the plurality of thin film transistors on the glass substrate, which moves in a predetermined direction, through the projection mask pattern, and the projection mask pattern is provided such that the openings are not continuous in one column orthogonal to the moving direction.

Abstract: There are provided a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes a pixel having a first thin film transistor and a drive circuit having a second thin film transistor and driving the pixel, wherein a first channel region of the first thin film transistor and a second channel region of the second thin film transistor are configured to have different electrical characteristics (for example, electron mobility, thereby enabling the first thin film transistor and the second thin film transistor to function suitably for the each role thereof).

Abstract: Provided are a thin film transistor, a display device, and a thin film transistor manufacturing method, in which variation in characteristics is small. The present invention is provided with: a gate electrode formed on a substrate; a gate insulation film formed so as to cover the gate electrode; a semiconductor layer which is formed on the upper side of the gate insulation film and which includes a polysilicon layer disposed, in a plan view, inside a region defined by the gate electrode; an etching stopper layer disposed on the upper side of the polysilicon layer; and a source electrode and a drain electrode provided on the semiconductor layer so as to be separated from each other, wherein the polysilicon layer has first and second regions which are not covered with the etching stopper layer, and a part of the source electrode exists above the first region and a part of the drain electrode exists above the second region.