Abstract: To provide a semiconductor device having improved reliability. A semiconductor device is provided forming a control gate electrode for memory cell on a semiconductor substrate via a first insulating film; forming a memory gate electrode for memory cell, which is adjacent to the control gate electrode, on the semiconductor substrate via a second insulating film having a charge storage portion; forming n? type semiconductor regions for source or drain in the semiconductor substrate by ion implantation; forming sidewall spacers on the side wall of the control gate electrode and the memory gate electrode; forming n+ type semiconductor regions for source or drain in the semiconductor substrate by ion implantation; and removing an upper portion of the second insulating film present between the control gate electrode and the memory gate electrode. A removal length of the second insulating film is larger than the depth of the n+ type semiconductor regions.

Abstract: To provide a semiconductor device having improved reliability. A semiconductor device is provided forming a control gate electrode for memory cell on a semiconductor substrate via a first insulating film; forming a memory gate electrode for memory cell, which is adjacent to the control gate electrode, on the semiconductor substrate via a second insulating film having a charge storage portion; forming n? type semiconductor regions for source or drain in the semiconductor substrate by ion implantation; forming sidewall spacers on the side wall of the control gate electrode and the memory gate electrode; forming n+ type semiconductor regions for source or drain in the semiconductor substrate by ion implantation; and removing an upper portion of the second insulating film present between the control gate electrode and the memory gate electrode. A removal length of the second insulating film is larger than the depth of the n+ type semiconductor regions.

Abstract: In a semiconductor device having an LDMOSFET, a source electrode is at the back surface thereof. Therefore, to reduce electric resistance between a source contact region in the top surface and the source electrode at the back surface, a poly-silicon buried plug is provided which extends from the upper surface into a P+-type substrate through a P-type epitaxial layer, and is heavily doped with boron. Dislocation occurs in a mono-crystalline silicon region around the poly-silicon buried plug to induce a leakage failure. The semiconductor device has a silicon-based plug extending through the boundary surface between first and second semiconductor layers having different impurity concentrations. At least the inside of the plug is a poly-crystalline region. Of the surface of the poly-crystalline region, the portions located on both sides of the foregoing boundary surface in adjacent relation thereto are each covered with a solid-phase epitaxial region.

Abstract: In a semiconductor device having an LDMOSFET, a source electrode is at the back surface thereof. Therefore, to reduce electric resistance between a source contact region in the top surface and the source electrode at the back surface, a poly-silicon buried plug is provided which extends from the upper surface into a P+-type substrate through a P-type epitaxial layer, and is heavily doped with boron. Dislocation occurs in a mono-crystalline silicon region around the poly-silicon buried plug to induce a leakage failure. The semiconductor device has a silicon-based plug extending through the boundary surface between first and second semiconductor layers having different impurity concentrations. At least the inside of the plug is a poly-crystalline region. Of the surface of the poly-crystalline region, the portions located on both sides of the foregoing boundary surface in adjacent relation thereto are each covered with a solid-phase epitaxial region.

Abstract: In a semiconductor device having an LDMOSFET, a source electrode is at the back surface thereof. Therefore, to reduce electric resistance between a source contact region in the top surface and the source electrode at the back surface, a poly-silicon buried plug is provided which extends from the upper surface into a P+-type substrate through a P-type epitaxial layer, and is heavily doped with boron. Dislocation occurs in a mono-crystalline silicon region around the poly-silicon buried plug to induce a leakage failure. The semiconductor device has a silicon-based plug extending through the boundary surface between first and second semiconductor layers having different impurity concentrations. At least the inside of the plug is a poly-crystalline region. Of the surface of the poly-crystalline region, the portions located on both sides of the foregoing boundary surface in adjacent relation thereto are each covered with a solid-phase epitaxial region.