Abstract: An aspect of the present invention includes; a silicon oxynitride film having an oxynitride layer which is formed on at least the surface of a silicon substrate and in which nitrogen atoms are in a three-coordinate bond state, and a silicon oxide layer which is formed between said oxynitride layer and said silicon substrate.

Abstract: A gate electrode of an n-channel IGFET includes a first region composed of at least a first IV group element and a second IV group element which are different from each other, and a second region composed of the first IV group element. Similarly, a gate electrode of a p-channel IGFET includes first and second regions. For example, the first region is made of SiGe while the second region is made of Si. In both of the n-channel and P-channel IGFET, silicide electrodes are formed on the gate electrodes 4N and 4P through silicidation of at least parts of the second regions.

Abstract: A semiconductor device having a semiconductor layer, includes: a first impurity atom having a covalent bond radius larger than a minimum radius of a covalent bond of a semiconductor constituent atom of a semiconductor layer; and a second impurity atom having a covalent bond radius smaller than a maximum radius of the covalent bond of the semiconductor constituent atom; wherein the first and second impurity atoms are arranged in a nearest neighbor lattice site location and at least one of the first and second impurity atoms is electrically active.

Abstract: The semiconductor device manufacturing system of the present invention comprises: insulating film determination unit for determining whether an insulating film is present on the substrate surface or not; in-insulating-film impurity concentration extraction unit for extracting the concentration of an impurity contained in the insulating film on the substrate surface; diffusion parameter determination unit for determining diffusion parameter values constituting the diffusion equation as a function of the concentration of the impurity contained in the insulating film; and in-substrate impurity profile extraction unit for extracting the impurity profile information in the substrate by solving the diffusion equation in which the diffusion parameter values are introduced.

Abstract: An aspect of the present invention includes; a silicon oxynitride film having an oxynitride layer which is formed on at least the surface of a silicon substrate and in which nitrogen atoms are in a three-coordinate bond state, and a silicon oxide layer which is formed between said oxynitride layer and said silicon substrate.

Abstract: A simulation apparatus configured to estimate properties of a semiconductor device, comprising: a first calculating part configured to calculate a first value corresponding to a prescribed physical property value by taking a prescribed physical quantity into consideration, with regard to at least a partial region of said semiconductor device; a second calculating part configured to calculate a second value corresponding to said physical property value without taking said physical quantity into consideration, with regard to at least a partial region of said semiconductor device, and a visualizing part configured to display, in a prescribed form, a correlation between said first and second values.

Abstract: A system for preparing manufacturing-process specifications employs process data serving both for a production control system and a simulation system, and effectively uses a result of simulation. The system prepares the manufacturing-process specifications through the steps of controlling apparatuses according to the manufacturing-process specifications, to carry out manufacturing processes; collecting data measured through the manufacturing processes; simulating the manufacturing processes according to corresponding models and parameters; correcting the models and parameters according to the collected data; and amending the manufacturing-process specifications according to a result of the simulation.

Abstract: A silicon wafer is heated from an initial pre-heating temperature (T0) up to a first annealing temperature (T1) by a rapid heating up step using an IR lamp. A first annealing is executed at the first annealing temperature (T1). Successively, while the silicon wafer is maintained at a second annealing temperature (T2) lower than the first annealing temperature (T1), a second annealing step is executed by a resistive heating furnace. A thermal oxidation can be executed as the second annealing step. To do so, an equipment for manufacturing a semiconductor device in the present invention is provided with: a heating device having an IR lamp and a resistive heater; an annealing tube having on a surface thereof a plurality of concave portions in such a way that each bottom approaches a central line; a resistive heater wrapped around this annealing tube; and an IR lamp movably inserted into and pulled out from the concave portion from the external.

Abstract: A silicon wafer is heated from an initial pre-heating temperature (T0) up to a first annealing temperature (T1) by a rapid heating up step using an IR lamp. A first annealing is executed at the first annealing temperature (T1). Successively, while the silicon wafer is maintained at a second annealing temperature (T2) lower than the first annealing temperature (T1), a second annealing step is executed by a resistive heating furnace. A thermal oxidation can be executed as the second annealing step. To do so, an equipment for manufacturing a semiconductor device in the present invention is provided with: a heating device having an IR lamp and a resistive heater; an annealing tube having on a surface thereof a plurality of concave portions in such a way that each bottom approaches a central line; a resistive heater wrapped around this annealing tube; and an IR lamp movably inserted into and pulled out from the concave portion from the external.