Abstract: Signal sampling transistors, to which signals to be sampled are coupled under the control of a first gate signal, and which couples these signals to holds circuits according to the first gate signal, are provided. A switching circuit for differentially switching the signal sampling transistors to complementarily turn off one of these transistors is also provided. This switching circuit includes transistors, one of which is turned on while the other is turned off according to a second gate signal. The individual switching circuit transistors are connected to the respective sampling transistors. With this arrangement, of the sampling transistors one to which the "on" state one of the switching circuit transistors is connected is turned off while the other is turned on. Thus, the conduction state of the sampling transistors for coupling the aforementioned signals to be sampled to the hold circuits can be forcibly controlled by the second gate signal irrespective of the first gate signal.

Abstract: An output circuit and a biasing circuit for biasing an oscillation circuit comprise a current mirror circuit. The DC level of the output signal from the oscillation circuit is level shifted by controlling the current of the current mirror circuit comprising the biasing circuit and the output circuit. This control is performed by suitably determining the number of diodes and the resistances of the resistors making up the current mirror circuit. The biasing circuit of the oscillation circuit may thus be utilized as the level shifting circuit, the DC level of the output signal of the oscillation circuit may be set to a predetermined level, and fluctuations in the duty ratio of the oscillation output may be suppressed.

Abstract: Horizontal sync signal is applied as a reference pulse signal to a first input terminal of a phase detector and is also applied as a gating pulse to a gate circuit. Output of a frequency divider which divides the frequency of the output of a VCO is applied as a comparison pulse to a second input terminal of the phase detector. In the phase detector, a phase detection pulse having a pulse width proportional to the phase difference between the reference pulse and the comparison pulse is obtained. This phase detection pulse is applied through a buffer to a gate circuit. In the gate circuit, the current path from the phase detection pulse input terminal to the output terminal is held conductive during the period of the gating pulse, and during this period an output pulse containing as a component thereof the phase detection pulse mentioned above is obtained. This output pulse is smoothed through a filter to be applied as an oscillation frequency control voltage input to the VCO.

Abstract: A composite color video signal including a luminance signal and a carrier chrominance signal multiplexed with the luminance signal is separated by a signal separating circuit to the luminance signal and the carrier chrominance signal. The luminance signal is clipped by a clipping circuit at levels approximating to its black and white peak levels and an output signal of the clipping circuit is shaped to control pulses corresponding to level transitions of the output signal by a wave shaping circuit. A signal attenuating circuit for attenuating the carrier chrominance signals or demodulated color signals in response to color pulses applied thereto is connected in a signal transmission path for receiving the carrier chrominance signal from the signal separating circuit to thereby reduce cross-color and color-fringing components caused at level transitions of the luminance signal.

Abstract: Signal sampling transistors, to which signals to be sampled are coupled under the control of a first gate signal, and which couples these signals to holds circuits according to the first gate signal, are provided. A switching circuit for differentially switching the signal sampling transistors to complementarily turn off one of these transistors is also provided. This switching circuit includes transistors, one of which is turned on while the other is turned off according to a second gate signal. The individual switching circuit transistors are connected to the respective sampling transistors. With this arrangement, of the sampling transistors one to which the "on" state one of the switching circuit transistors is connected is turned off while the other is turned on. Thus, the conduction state of the sampling transistors for coupling the aforementioned signals to be sampled to the hold circuits can be forcibly controlled by the second gate signal irrespective of the first gate signal.

Abstract: DC control signals responsive to ACC voltages are applied to a color signal amplifier, to which recording and reproducing color signals are applied, to control the operation of the color signal amplifier to recording or reproducing mode. Such control is attained by using color killer signal responsive to mode changeover and ACC detector signals which serve to assign the color signal amplifier to recording or reproducing mode. Color signals are obtained from the output terminal of the color signal amplifier in both modes. In the case of recording mode, essentially undesirable recording color signals appearing to the output terminal of the color signal amplifier are by-passed by a low-pass filter, and only ACC detector voltages which are used as color killer signals are supplied to a mixer circuit which mixes brightness and color signals to generate composite color signals to be recorded.

Abstract: A video circuit is responsive to a TV radio wave with a given field strength. The video circuit provides a composite color video signal contained in the TV radio wave and generates a control signal corresponding to the field strength of TV radio wave. A signal separator is coupled to the video circuit. The signal separator separates I and Q signals from the composite color video signal. A color decoder is coupled to the signal separator and responsive to the I and Q signals. The color decoder generates color difference signals. The chrominance demodulator includes an I signal processor coupled to the video circuit, signal separator and color decoder. The chrominance demodulator composes a controlled I signal from the control signal and I signal and provides the color decoder with the controlled I signal. The frequency response characteristic between the I signal and controlled I signal is changed according to the control signal.

Abstract: An arrangement for coupling an AC input signal having a DC component to a plurality of differential amplifiers without causing a DC off-set. The AC input including a DC component is commonly fed through a compensation resistor to a signal input terminal of each of the differential amplifiers. The DC component contained in the AC input signal is extracted by a low-pass filter including a resistor and a capacitor and is applied to a bias input terminal of each of the differential amplifiers.

Abstract: A composite video signal is separated into luminance signal component and carrier chrominance signal component by means of a signal separation circuit using a comb filter. The carrier chrominance signal component is multiplexed in frequency-interleaved relation with the luminance signal component, and formed by quadrature modulation of a color subcarrier with a wideband I signal and a narrowband Q signal. A line correlation detector for detecting the correlation between video signals on adjacent horizontal scanning lines is connected with both outputs of the signal separation circuit. The detector detects the absence of line correlation when color subcarrier frequency appears simultaneously at both outputs of the signal separation circuit. The I signal is demodulated in wideband when the line correlation exists and in narrowband when no line correlation exists.

Abstract: In the recording operation of a video recorder, a color signal (3.58 MHz) is frequency-converted to a low frequency converted color signal (688 kHz) by a color signal processing device. In the reproducing operation of the video tape recorder, the regenerative low frequency converted signal (688 kHz) is reconverted to the color signal of original frequency (3.58 MHz) by the color signal processing device. The signal (3.58 MHz or 688 kHz) which has passed a switching circuit is gain-controlled by a color signal amplifier and is input to a balanced modulator. A converting signal (FO3=4.27 MHz) is also input to the balanced modulator. The output of the balanced modulator is obtained as a frequency-converted signal (688 kHz or 3.58 MHz) through a low-pass filter or a band-pass filter. The converting signal (F03=4.27 MHz) is obtained by balanced modulation, at a second balanced modulator, of an oscillation output (3.

Abstract: There are provided circuits for removing the equalizing pulses from the video signal. A composite sync signal separated from a video signal is applied to a gate circuit, so that only horizontal sync pulses are extracted. The gate pulse applied to the gate circuit is formed in the following manner. Clock pulses of a frequency 175/4 f.sub.H (f.sub.H : a horizontal scanning frequency and about 15,734 KHz), for example, is frequency-divided into a signal of a frequency 175/256 f.sub.H by a frequency divider. A reset circuit processes the frequency-divided output signal, the delayed sync signal and the inverted composite sync signal to form pulses in synchronism with the horizontal sync pulses. The pulses thus obtained reset the frequency divider. At the same timing of the pulse generation from the reset circuit, a gate pulse generating circuit generates pulses whose pulse widths are longer than the pulse widths of the horizontal pulses, which in turn are applied as the gate pulse to the gate circuit.