Patents by Inventor Nobuya Sumiyoshi

Nobuya Sumiyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7421054
    Abstract: A sampling clock generator circuit comprises a ring oscillator including series-connected m first inverters connected to a first power supply line, where m is an odd number equal to or larger than 3, a delay line including series-connected 2m or 2m?1 second inverters connected to a second power supply line, for delaying an externally supplied clock, and a PLL circuit for controlling an oscillation frequency of the ring oscillator by controlling a voltage of the first power supply line by using the ring oscillator as a voltage controlled oscillation circuit. A voltage of the second power supply line is set substantially equal to the voltage of the first power supply line and the delayed clock obtained by the second inverters is used as a sampling clock.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: September 2, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Nobuya Sumiyoshi
  • Publication number: 20070195918
    Abstract: A sampling clock generator circuit comprises a ring oscillator including series-connected m first inverters connected to a first power supply line, where m is an odd number equal to or larger than 3, a delay line including series-connected 2m or 2m?1 second inverters connected to a second power supply line, for delaying an externally supplied clock, and a PLL circuit for controlling an oscillation frequency of the ring oscillator by controlling a voltage of the first power supply line by using the ring oscillator as a voltage controlled oscillation circuit. A voltage of the second power supply line is set substantially equal to the voltage of the first power supply line and the delayed clock obtained by the second inverters is used as a sampling clock.
    Type: Application
    Filed: April 26, 2007
    Publication date: August 23, 2007
    Inventor: Nobuya Sumiyoshi
  • Patent number: 7233638
    Abstract: A sampling clock generator circuit comprises a ring oscillator including series-connected m first inverters connected to a first power supply line, where m is an odd number equal to or larger than 3, a delay line including series-connected 2m or 2m?1 second inverters connected to a second power supply line, for delaying an externally supplied clock, and a PLL circuit for controlling an oscillation frequency of the ring oscillator by controlling a voltage of the first power supply line by using the ring oscillator as a voltage controlled oscillation circuit. A voltage of the second power supply line is set substantially equal to the voltage of the first power supply line and the delayed clock obtained by the second inverters is used as a sampling clock.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: June 19, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Nobuya Sumiyoshi
  • Patent number: 7190739
    Abstract: In order to extract proper signals out of signals containing jitters and skews, the most stable data rows are selected out of data rows obtained by oversampling. A regenerator circuit of serial data is comprised of means for storing serial data as received for two system clocks, means for comparing special character signals used in transmission with the data as stored for two system clocks, and determination means for determining positions (shift numbers) where patterns of the data match the special character signal, respectively, wherein correction for skews is implemented by sampling the data on the basis of information on the positions where matching is made, as determined by the determination means.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: March 13, 2007
    Assignee: Rohm Co., Ltd.
    Inventors: Nobuya Sumiyoshi, Masaya Hirakawa
  • Publication number: 20040042577
    Abstract: In order to extract proper signals out of signals containing jitters and skews, the most stable data rows are selected out of data rows obtained by oversampling. A regenerator circuit of serial data is comprised of means for storing serial data as received for two system clocks, means for comparing special character signals used in transmission with the data as stored for two system clocks, and determination means for determining positions (shift numbers) where patterns of the data match the special character signal, respectively, wherein correction for skews is implemented by sampling the data on the basis of information on the positions where matching is made, as determined by the determination means.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 4, 2004
    Applicant: ROHM CO., LTD.
    Inventors: Nobuya Sumiyoshi, Masaya Hirakawa
  • Publication number: 20020101947
    Abstract: A sampling clock generator circuit comprises a ring oscillator including series-connected m first inverters connected to a first power supply line, where m is an odd number equal to or larger than 3, a delay line including series-connected 2m or 2m−1 second inverters connected to a second power supply line, for delaying an externally supplied clock, and a PLL circuit for controlling an oscillation frequency of the ring oscillator by controlling a voltage of the first power supply line by using the ring oscillator as a voltage controlled oscillation circuit. A voltage of the second power supply line is set substantially equal to the voltage of the first power supply line and the delayed clock obtained by the second inverters is used as a sampling clock.
    Type: Application
    Filed: January 25, 2002
    Publication date: August 1, 2002
    Inventor: Nobuya Sumiyoshi